#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
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#
6fa1cca7 |
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01-May-2024 |
Tom Rini <trini@konsulko.com> |
mtd: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Tom Rini <trini@konsulko.com>
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#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
dd01a229 |
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11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
84e6fe3c |
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11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
601b8901 |
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04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
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#
7363cf05 |
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19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
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#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
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#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
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#
04fcd258 |
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19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
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#
ec2c9240 |
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11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
cd72a950 |
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11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
7e4a494c |
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11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
c6bafdae |
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11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
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#
1cefed1e |
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22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
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#
6fa1cca7 |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
mtd: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Tom Rini <trini@konsulko.com>
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#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
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#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
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#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
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#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
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#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
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#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
6fa1cca7 |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
mtd: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Tom Rini <trini@konsulko.com>
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#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
dd01a229 |
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11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
84e6fe3c |
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11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
601b8901 |
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04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
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#
7363cf05 |
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19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
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#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
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#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
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#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
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#
ec2c9240 |
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11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
cd72a950 |
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11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
7e4a494c |
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11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
c6bafdae |
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11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
4e590945 |
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12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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#
185f812c |
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19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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#
f44bcb9f |
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18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
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#
1cefed1e |
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22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
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#
6fa1cca7 |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
mtd: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Tom Rini <trini@konsulko.com>
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#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
601b8901 |
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04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
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#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
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#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
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#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
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#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
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#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
d678a59d |
|
18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com>
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#
6fa1cca7 |
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01-May-2024 |
Tom Rini <trini@konsulko.com> |
mtd: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Tom Rini <trini@konsulko.com>
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#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
dd01a229 |
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11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
84e6fe3c |
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11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
601b8901 |
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04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
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#
7363cf05 |
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19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
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#
b7470907 |
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19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
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#
ff0d0789 |
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19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
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#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
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#
ec2c9240 |
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11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
cd72a950 |
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11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
7e4a494c |
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11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
c6bafdae |
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11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
4e590945 |
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12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
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#
185f812c |
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19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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#
f44bcb9f |
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18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
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#
1cefed1e |
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22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
6fa1cca7 |
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01-May-2024 |
Tom Rini <trini@konsulko.com> |
mtd: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Tom Rini <trini@konsulko.com>
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#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
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#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
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#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
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#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
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#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
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#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
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#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
6fa1cca7 |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
mtd: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
6fa1cca7 |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
mtd: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
6fa1cca7 |
|
01-May-2024 |
Tom Rini <trini@konsulko.com> |
mtd: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Reviewed-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
e76959ab |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: fix OF based partition parsing for NAND Set NAND chip ofnode and device so OF based partition parsing can work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499178.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
dd01a229 |
|
11-Jan-2024 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Use DT provided IO address For DM case we can get the NAND chip's IO address from DT so we don't need to rely on CFG_SYS_NAND_BASE. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://www.mail-archive.com/u-boot@lists.denx.de/msg499177.html Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
84e6fe3c |
|
11-Dec-2023 |
Roger Quadros <rogerq@kernel.org> |
mtd: nand: omap_gpmc: Fix NAND in SPL for AM335x AM335x uses a special driver "am335x_spl_bch.c" as SPL NAND loader. This driver expects 1 sector at a time ECC and doesn't work well with multi-sector ECC that was implemented in commit 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Additionally, the omap_elm driver does not support multi sector ECC and will need more work and tests to get multi sector working correctly on all platforms. Switch back to 1 sector at a time read/ECC. Fixes: 04fcd2587321 ("mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction") Signed-off-by: Roger Quadros <rogerq@kernel.org> Tested-by: Enrico Leto <enrico.leto@siemens.com> Tested-by: Heiko Schocher <hs@denx.de> Link: https://lore.kernel.org/all/20231211114600.4414-2-rogerq@kernel.org/ Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
601b8901 |
|
04-Nov-2023 |
Sean Anderson <seanga2@gmail.com> |
nand: Calculate SYS_NAND_BLOCK_PAGES (neé SYS_NAND_PAGE_COUNT) automatically Contrary to what the help message says, this is the number of pages per block. Calculate it automatically based on SYS_NAND_BLOCK_SIZE and SYS_NAND_PAGE_SIZE. To better reflect its semantics, rename it to SYS_NAND_BLOCK_PAGES. Signed-off-by: Sean Anderson <seanga2@gmail.com>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
7363cf05 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_elm: u-boot driver model support Support u-boot driver model. We still retain support legacy way of doing things if ELM_BASE is defined in <asm/arch/hardware.h> We could completely get rid of that if all platforms defining ELM_BASE get rid of that definition and enable CONFIG_SYS_NAND_SELF_INIT and are verified to work. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Reviewed-by: Tom Rini <trini@konsulko.com> Link: https://lore.kernel.org/all/20221220102203.52398-9-rogerq@kernel.org Link: https://lore.kernel.org/all/CABGWkvrvKiVA_yaDnHJcHEKwc+pEuLdz=i6HQEY0oJQvohCUsw@mail.gmail.com
|
#
b7470907 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Add SPL NAND support Enables SPL NAND support for ARCH_K3 by enabling SPL_NAND_INIT and SPL_SYS_NAND_SELF_INIT. Legacy OMAP2plus platforms still rely on SPL_NAND_AM33XX_BCH instead. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-6-rogerq@kernel.org
|
#
ff0d0789 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: support u-boot driver model Adds driver model support. We need to be able to self initialize the NAND controller/chip at probe and so enable CONFIG_SYS_NAND_SELF_INIT. Doing so requires nand_register() API which is provided by nand.c and needs to be enabled during SPL build via CONFIG_SPL_NAND_INIT. But nand.c also provides nand_init() so we need to get rid of nand_init() in omap_gpmc driver if CONFIG_SPL_NAND_INIT is set. Signed-off-by: Roger Quadros <rogerq@kernel.org> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-5-rogerq@kernel.org
|
#
04fcd258 |
|
19-Dec-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix BCH6/16 HW based correction The BCH detection hardware can generate ECC bytes for multiple sectors in one go. Use that feature. correct() only corrects one sector at a time so we need to call it repeatedly for each sector. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com> Link: https://lore.kernel.org/all/20221220102203.52398-2-rogerq@kernel.org
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
4e590945 |
|
12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_NAND_* to CFG_SYS_NAND_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS_NAND namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
ec2c9240 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Reduce .bss usage Allocate omap_ecclayout on the heap as we have limited .bss space on AM64 R5 SPL configuration. Reduces .bss usage by 2984 bytes. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-By: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-9-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
cd72a950 |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Optimize NAND reads Rename omap_nand_read() to omap_nand_read_buf() to reflect actual behaviour. Use FIFO read address instead of raw read address for reads. The GPMC automatically converts 32-bit/16-bit reads to NAND device specific reads (8/16 bit). Use the largest possible read granularity size for more efficient reads. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-5-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
7e4a494c |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Fix build warning on 64-bit platforms Pointer size cannot be assumed to be 32-bit, so use use uintptr_t instead of uint32_t. Fixes the below build warning on 64-bit builds. drivers/mtd/nand/raw/omap_gpmc.c:439:10: warning: cast from pointer to integer of different size [-Wpointer-to-int-cast] head = ((uint32_t) buf) % 4; Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-4-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
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#
c6bafdae |
|
11-Oct-2022 |
Roger Quadros <rogerq@kernel.org> |
mtd: rawnand: omap_gpmc: Deprecate asm/arch/mem.h We want to get rid of <asm/arch/mem.h> so don't enforce it for new platforms. This also means GPMC_MAX CS doesn't have to be defined by platform code. Define it locally here for now. Signed-off-by: Roger Quadros <rogerq@kernel.org> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Link: https://lore.kernel.org/all/20221011115012.6181-2-rogerq@kernel.org Signed-off-by: Dario Binacchi <dario.binacchi@amarulasolutions.com>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
185f812c |
|
19-Jan-2022 |
Heinrich Schuchardt <xypron.glpk@gmx.de> |
doc: replace @return by Return: Sphinx expects Return: and not @return to indicate a return value. find . -name '*.c' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; find . -name '*.h' -exec \ sed -i 's/^\(\s\)\*\(\s*\)@return\(\s\)/\1*\2Return:\3/' {} \; Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f44bcb9f |
|
18-Nov-2021 |
David Rivshin <DRivshin@allworx.com> |
nand: gpmc: Handle bitflips in erased pages when using BCH ECC engine In the case of an erased (sub)page both the data and ECC are all 0xFF bytes. This fails the normal ECC verification, as the computed ECC of all-0xFF is not also 0xFF. The GPMC NAND driver attempted to detect erased pages by checking that the ECC bytes are all-0xFF, but this had two problems: 1) bitflips in the data were not corrected, so the data looked not-erased 2) bitflips in the ECC bytes were reported as uncorrectable ECC errors The equivalent Linux driver [1] correctly handles this by counting the number of 0-bits in the combination of data and ECC bytes. If the number of 0-bits is less than the amount of bits correctable by the selected ECC algorithm, then it is treated as an erased page with correctable bitflips. Implement similar, though simplified, logic in omap_correct_data_bch(). [1] see omap_elm_correct_data() in omap2.c Signed-off-by: David Rivshin <drivshin@allworx.com>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
1cefed1e |
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22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
1cefed1e |
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22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
1cefed1e |
|
22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
nand.h: Cleanup linux/mtd/rawnand.h usage We only include <linux/mtd/rawnand.h> in <nand.h> for the forward declaration of struct nand_chip, so do that directly. Then, include <linux/mtd/rawnand.h> where required directly. Signed-off-by: Tom Rini <trini@konsulko.com>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
f7ae49fc |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
f7ae49fc |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop log.h from common header Move this header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
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#
a430fa06 |
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16-Aug-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: move NAND files into a raw/ subdirectory NAND flavors, like serial and parallel, have a lot in common and would benefit to share code. Let's move raw (parallel) NAND specific code in a raw/ subdirectory, to ease the addition of a core file in nand/ and the introduction of a spi/ subdirectory specific to SPI NANDs. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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