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d678a59d |
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18-May-2024 |
Tom Rini <trini@konsulko.com> |
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> |
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4fa7521f |
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01-May-2024 |
Tom Rini <trini@konsulko.com> |
misc: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d66b0f5d |
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25-Mar-2022 |
This contributor prefers not to receive mails <noreply@example.com> |
Fix URLs to old freescale git repos Freescale git repos are now on source.codeaurora.org. Signed-off-by: Pali Rohár <pali@kernel.org> |
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10867a0d |
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19-Mar-2021 |
Ye Li <ye.li@nxp.com> |
misc: ocotp: Update OCOTP driver for iMX8MQ B2 i.MX8MQ B2 also has fixed value in OCOTP_READ_FUSE_DATA register, so it does not support "fuse sense" command like B1. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
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c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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67f3f32c |
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23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
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b3cf86c8 |
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17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
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112ad600 |
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17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
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cd357ad1 |
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20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com> |
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83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
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8a099b68 |
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09-Jan-2018 |
Peng Fan <peng.fan@nxp.com> |
misc: ocotp: add i.MX8M support i.MX8M OCOTP follow same flow as i.MX6Q, but it has 64 banks and each bank 4 words. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
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8df42bee |
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02-Jan-2018 |
Peng Fan <peng.fan@nxp.com> |
misc: mxc_ocotp: check fuse word before programming on i.MX7ULP On i.MX7ULP, the fuse words (except bank 0 and 1) only supports to write once, because they use ECC mode. Multiple writes may damage the ECC value and cause a wrong fuse value decoded when reading. This patch adds a checking before the fuse word programming, only can write when the word value is 0. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
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552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
3ca0f0d2 |
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22-Feb-2017 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: Update driver to support OCOTP controller on i.MX7ULP Update the mxc_ocotp driver to support i.MX7ULP. The read/write sequence has some changes due to PDN and OUT_STATUS registers added and TIME register is removed. Also update the bank size and number. Add is_mx7ulp macro in sys_proto.h Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de> |
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b2ebdd85 |
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11-Dec-2016 |
Peng Fan <peng.fan@nxp.com> |
OCOTP: Update OCOTP driver to support i.MX6SLL Add the i.MX6SLL support to OCOTP driver. The i.MX6SLL reuses the i.MX6ULL fuse, bank 7 and bank8 have 4 words each, and there is a hole between bank 5 and bank 6. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
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f8b95731 |
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11-Aug-2016 |
Peng Fan <van.freenix@gmail.com> |
imx: ocotp: support i.MX6ULL i.MX6ULL has two 128 bits fuse banks, bank 7 and bank 8, while other banks use 256 bits. So we have to adjust the word and bank index when accessing the bank 8. When in command line `fuse read 8 0 1`, you can image `fuse read 7 4 1` in the ocotp driver implementation for 6ULL. When programming, we use word index, so need to fix bank7/8 programming for i.mx6ull. For example: fuse prog 8 3 1; The word index is (8 << 3 | 3) --> 67. But actully it should be (7 << 3 | 7) ---> 63. So fix it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> |
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1221ce45 |
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20-Sep-2016 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
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bff75503 |
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23-May-2016 |
Peng Fan <van.freenix@gmail.com> |
ocotp: mxc: use simpler runtime cpu dection macros Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> |
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7296a023 |
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26-Aug-2015 |
Peng Fan <Peng.Fan@freescale.com> |
mxc: ocotp fix hole in shadow registers There is a hole in shadow registers address map of size 0x100 between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL. Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses, we should account for this hole in address space. Similar hole exists between bank 14 and bank 15 of size 0x80 on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX. Note: iMX6SL has only 0-7 banks and there is no hole. Note: iMX6UL doesn't have this one. When reading, we use register offset, so need to account for holes to get the correct address. When writing, we use bank/word index, there is no need to account for holes, always use bank/word index from fuse map. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> |
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42c91c10 |
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11-Aug-2015 |
Adrian Alonso <aalonso@freescale.com> |
imx: ocotp: mxc add i.MX7D support * Ocotp of i.MX7D has different operation rule. This patch is to add support for i.MX7D ocotp. Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> |
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a847fff1 |
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25-Nov-2014 |
Fabio Estevam <fabio.estevam@freescale.com> |
mxc_ocotp: Do not disable the OCOTP clock after every access Leave the OCOTP turned on, so that we subsequent access do not fail. After enabling the thermal driver on a mx6sxsabresd board: U-Boot 2015.01-rc1-18267-g99d4189-dirty (Nov 24 2014 - 12:59:01) CPU: Freescale i.MX6SX rev1.0 at 792 MHz CPU: Temperature 48 C Reset cause: POR Board: MX6SX SABRE SDB I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 00:01.0 - 16c3:abcd - Bridge device 01:00.0 - 8086:08b1 - Network controller In: serial Out: serial Err: serial Net: (hang) As the thermal driver accesses the ocotp registers, its clock will be disabled afterwards. Then when the MAC address is read (also from ocotp registers) it will cause a hang. Do not disable the ocotp clock to prevent this problem. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> |
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4515992f |
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06-Nov-2014 |
Masahiro Yamada <masahiroy@kernel.org> |
replace DIV_ROUND with DIV_ROUND_CLOSEST The Linux-compatible macro DIV_ROUND_CLOSEST is a bit more flexible and safer than DIV_ROUND. For example, foo = DIV_ROUND_CLOSEST(x, y++) works expectedly, but foo = DIV_ROUND(x, y++) does not. (y is incremented twice.) Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
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1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
112fd2ec |
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23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
Add mxc_ocotp driver Add an mxc_ocotp driver for i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
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4fa7521f |
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01-May-2024 |
Tom Rini <trini@konsulko.com> |
misc: Remove <common.h> and add needed includes Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> |
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d66b0f5d |
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25-Mar-2022 |
This contributor prefers not to receive mails <noreply@example.com> |
Fix URLs to old freescale git repos Freescale git repos are now on source.codeaurora.org. Signed-off-by: Pali Rohár <pali@kernel.org> |
#
10867a0d |
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19-Mar-2021 |
Ye Li <ye.li@nxp.com> |
misc: ocotp: Update OCOTP driver for iMX8MQ B2 i.MX8MQ B2 also has fixed value in OCOTP_READ_FUSE_DATA register, so it does not support "fuse sense" command like B1. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
c05ed00a |
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10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
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67f3f32c |
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23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
b3cf86c8 |
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17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
112ad600 |
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17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
cd357ad1 |
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20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
8a099b68 |
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09-Jan-2018 |
Peng Fan <peng.fan@nxp.com> |
misc: ocotp: add i.MX8M support i.MX8M OCOTP follow same flow as i.MX6Q, but it has 64 banks and each bank 4 words. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8df42bee |
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02-Jan-2018 |
Peng Fan <peng.fan@nxp.com> |
misc: mxc_ocotp: check fuse word before programming on i.MX7ULP On i.MX7ULP, the fuse words (except bank 0 and 1) only supports to write once, because they use ECC mode. Multiple writes may damage the ECC value and cause a wrong fuse value decoded when reading. This patch adds a checking before the fuse word programming, only can write when the word value is 0. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
552a848e |
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29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
3ca0f0d2 |
|
22-Feb-2017 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: Update driver to support OCOTP controller on i.MX7ULP Update the mxc_ocotp driver to support i.MX7ULP. The read/write sequence has some changes due to PDN and OUT_STATUS registers added and TIME register is removed. Also update the bank size and number. Add is_mx7ulp macro in sys_proto.h Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de> |
#
b2ebdd85 |
|
11-Dec-2016 |
Peng Fan <peng.fan@nxp.com> |
OCOTP: Update OCOTP driver to support i.MX6SLL Add the i.MX6SLL support to OCOTP driver. The i.MX6SLL reuses the i.MX6ULL fuse, bank 7 and bank8 have 4 words each, and there is a hole between bank 5 and bank 6. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
f8b95731 |
|
11-Aug-2016 |
Peng Fan <van.freenix@gmail.com> |
imx: ocotp: support i.MX6ULL i.MX6ULL has two 128 bits fuse banks, bank 7 and bank 8, while other banks use 256 bits. So we have to adjust the word and bank index when accessing the bank 8. When in command line `fuse read 8 0 1`, you can image `fuse read 7 4 1` in the ocotp driver implementation for 6ULL. When programming, we use word index, so need to fix bank7/8 programming for i.mx6ull. For example: fuse prog 8 3 1; The word index is (8 << 3 | 3) --> 67. But actully it should be (7 << 3 | 7) ---> 63. So fix it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <masahiroy@kernel.org> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
bff75503 |
|
23-May-2016 |
Peng Fan <van.freenix@gmail.com> |
ocotp: mxc: use simpler runtime cpu dection macros Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> |
#
7296a023 |
|
26-Aug-2015 |
Peng Fan <Peng.Fan@freescale.com> |
mxc: ocotp fix hole in shadow registers There is a hole in shadow registers address map of size 0x100 between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL. Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses, we should account for this hole in address space. Similar hole exists between bank 14 and bank 15 of size 0x80 on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX. Note: iMX6SL has only 0-7 banks and there is no hole. Note: iMX6UL doesn't have this one. When reading, we use register offset, so need to account for holes to get the correct address. When writing, we use bank/word index, there is no need to account for holes, always use bank/word index from fuse map. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> |
#
42c91c10 |
|
11-Aug-2015 |
Adrian Alonso <aalonso@freescale.com> |
imx: ocotp: mxc add i.MX7D support * Ocotp of i.MX7D has different operation rule. This patch is to add support for i.MX7D ocotp. Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> |
#
a847fff1 |
|
25-Nov-2014 |
Fabio Estevam <fabio.estevam@freescale.com> |
mxc_ocotp: Do not disable the OCOTP clock after every access Leave the OCOTP turned on, so that we subsequent access do not fail. After enabling the thermal driver on a mx6sxsabresd board: U-Boot 2015.01-rc1-18267-g99d4189-dirty (Nov 24 2014 - 12:59:01) CPU: Freescale i.MX6SX rev1.0 at 792 MHz CPU: Temperature 48 C Reset cause: POR Board: MX6SX SABRE SDB I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 00:01.0 - 16c3:abcd - Bridge device 01:00.0 - 8086:08b1 - Network controller In: serial Out: serial Err: serial Net: (hang) As the thermal driver accesses the ocotp registers, its clock will be disabled afterwards. Then when the MAC address is read (also from ocotp registers) it will cause a hang. Do not disable the ocotp clock to prevent this problem. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> |
#
4515992f |
|
06-Nov-2014 |
Masahiro Yamada <masahiroy@kernel.org> |
replace DIV_ROUND with DIV_ROUND_CLOSEST The Linux-compatible macro DIV_ROUND_CLOSEST is a bit more flexible and safer than DIV_ROUND. For example, foo = DIV_ROUND_CLOSEST(x, y++) works expectedly, but foo = DIV_ROUND(x, y++) does not. (y is incremented twice.) Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
112fd2ec |
|
23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
Add mxc_ocotp driver Add an mxc_ocotp driver for i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
#
d66b0f5d |
|
25-Mar-2022 |
Pali Rohár <pali@kernel.org> |
Fix URLs to old freescale git repos Freescale git repos are now on source.codeaurora.org. Signed-off-by: Pali Rohár <pali@kernel.org> |
#
10867a0d |
|
19-Mar-2021 |
Ye Li <ye.li@nxp.com> |
misc: ocotp: Update OCOTP driver for iMX8MQ B2 i.MX8MQ B2 also has fixed value in OCOTP_READ_FUSE_DATA register, so it does not support "fuse sense" command like B1. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
8a099b68 |
|
09-Jan-2018 |
Peng Fan <peng.fan@nxp.com> |
misc: ocotp: add i.MX8M support i.MX8M OCOTP follow same flow as i.MX6Q, but it has 64 banks and each bank 4 words. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8df42bee |
|
02-Jan-2018 |
Peng Fan <peng.fan@nxp.com> |
misc: mxc_ocotp: check fuse word before programming on i.MX7ULP On i.MX7ULP, the fuse words (except bank 0 and 1) only supports to write once, because they use ECC mode. Multiple writes may damage the ECC value and cause a wrong fuse value decoded when reading. This patch adds a checking before the fuse word programming, only can write when the word value is 0. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
552a848e |
|
29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
3ca0f0d2 |
|
22-Feb-2017 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: Update driver to support OCOTP controller on i.MX7ULP Update the mxc_ocotp driver to support i.MX7ULP. The read/write sequence has some changes due to PDN and OUT_STATUS registers added and TIME register is removed. Also update the bank size and number. Add is_mx7ulp macro in sys_proto.h Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de> |
#
b2ebdd85 |
|
11-Dec-2016 |
Peng Fan <peng.fan@nxp.com> |
OCOTP: Update OCOTP driver to support i.MX6SLL Add the i.MX6SLL support to OCOTP driver. The i.MX6SLL reuses the i.MX6ULL fuse, bank 7 and bank8 have 4 words each, and there is a hole between bank 5 and bank 6. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
f8b95731 |
|
11-Aug-2016 |
Peng Fan <van.freenix@gmail.com> |
imx: ocotp: support i.MX6ULL i.MX6ULL has two 128 bits fuse banks, bank 7 and bank 8, while other banks use 256 bits. So we have to adjust the word and bank index when accessing the bank 8. When in command line `fuse read 8 0 1`, you can image `fuse read 7 4 1` in the ocotp driver implementation for 6ULL. When programming, we use word index, so need to fix bank7/8 programming for i.mx6ull. For example: fuse prog 8 3 1; The word index is (8 << 3 | 3) --> 67. But actully it should be (7 << 3 | 7) ---> 63. So fix it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
bff75503 |
|
23-May-2016 |
Peng Fan <van.freenix@gmail.com> |
ocotp: mxc: use simpler runtime cpu dection macros Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> |
#
7296a023 |
|
26-Aug-2015 |
Peng Fan <Peng.Fan@freescale.com> |
mxc: ocotp fix hole in shadow registers There is a hole in shadow registers address map of size 0x100 between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL. Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses, we should account for this hole in address space. Similar hole exists between bank 14 and bank 15 of size 0x80 on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX. Note: iMX6SL has only 0-7 banks and there is no hole. Note: iMX6UL doesn't have this one. When reading, we use register offset, so need to account for holes to get the correct address. When writing, we use bank/word index, there is no need to account for holes, always use bank/word index from fuse map. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> |
#
42c91c10 |
|
11-Aug-2015 |
Adrian Alonso <aalonso@freescale.com> |
imx: ocotp: mxc add i.MX7D support * Ocotp of i.MX7D has different operation rule. This patch is to add support for i.MX7D ocotp. Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> |
#
a847fff1 |
|
25-Nov-2014 |
Fabio Estevam <fabio.estevam@freescale.com> |
mxc_ocotp: Do not disable the OCOTP clock after every access Leave the OCOTP turned on, so that we subsequent access do not fail. After enabling the thermal driver on a mx6sxsabresd board: U-Boot 2015.01-rc1-18267-g99d4189-dirty (Nov 24 2014 - 12:59:01) CPU: Freescale i.MX6SX rev1.0 at 792 MHz CPU: Temperature 48 C Reset cause: POR Board: MX6SX SABRE SDB I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 00:01.0 - 16c3:abcd - Bridge device 01:00.0 - 8086:08b1 - Network controller In: serial Out: serial Err: serial Net: (hang) As the thermal driver accesses the ocotp registers, its clock will be disabled afterwards. Then when the MAC address is read (also from ocotp registers) it will cause a hang. Do not disable the ocotp clock to prevent this problem. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> |
#
4515992f |
|
06-Nov-2014 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
replace DIV_ROUND with DIV_ROUND_CLOSEST The Linux-compatible macro DIV_ROUND_CLOSEST is a bit more flexible and safer than DIV_ROUND. For example, foo = DIV_ROUND_CLOSEST(x, y++) works expectedly, but foo = DIV_ROUND(x, y++) does not. (y is incremented twice.) Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
112fd2ec |
|
23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
Add mxc_ocotp driver Add an mxc_ocotp driver for i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
#
10867a0d |
|
19-Mar-2021 |
Ye Li <ye.li@nxp.com> |
misc: ocotp: Update OCOTP driver for iMX8MQ B2 i.MX8MQ B2 also has fixed value in OCOTP_READ_FUSE_DATA register, so it does not support "fuse sense" command like B1. Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> |
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com> |
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
8a099b68 |
|
09-Jan-2018 |
Peng Fan <peng.fan@nxp.com> |
misc: ocotp: add i.MX8M support i.MX8M OCOTP follow same flow as i.MX6Q, but it has 64 banks and each bank 4 words. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> |
#
8df42bee |
|
02-Jan-2018 |
Peng Fan <peng.fan@nxp.com> |
misc: mxc_ocotp: check fuse word before programming on i.MX7ULP On i.MX7ULP, the fuse words (except bank 0 and 1) only supports to write once, because they use ECC mode. Multiple writes may damage the ECC value and cause a wrong fuse value decoded when reading. This patch adds a checking before the fuse word programming, only can write when the word value is 0. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
552a848e |
|
29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com> |
#
3ca0f0d2 |
|
22-Feb-2017 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: Update driver to support OCOTP controller on i.MX7ULP Update the mxc_ocotp driver to support i.MX7ULP. The read/write sequence has some changes due to PDN and OUT_STATUS registers added and TIME register is removed. Also update the bank size and number. Add is_mx7ulp macro in sys_proto.h Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de> |
#
b2ebdd85 |
|
11-Dec-2016 |
Peng Fan <peng.fan@nxp.com> |
OCOTP: Update OCOTP driver to support i.MX6SLL Add the i.MX6SLL support to OCOTP driver. The i.MX6SLL reuses the i.MX6ULL fuse, bank 7 and bank8 have 4 words each, and there is a hole between bank 5 and bank 6. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> |
#
f8b95731 |
|
11-Aug-2016 |
Peng Fan <van.freenix@gmail.com> |
imx: ocotp: support i.MX6ULL i.MX6ULL has two 128 bits fuse banks, bank 7 and bank 8, while other banks use 256 bits. So we have to adjust the word and bank index when accessing the bank 8. When in command line `fuse read 8 0 1`, you can image `fuse read 7 4 1` in the ocotp driver implementation for 6ULL. When programming, we use word index, so need to fix bank7/8 programming for i.mx6ull. For example: fuse prog 8 3 1; The word index is (8 << 3 | 3) --> 67. But actully it should be (7 << 3 | 7) ---> 63. So fix it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de> |
#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com> |
#
bff75503 |
|
23-May-2016 |
Peng Fan <van.freenix@gmail.com> |
ocotp: mxc: use simpler runtime cpu dection macros Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> |
#
7296a023 |
|
26-Aug-2015 |
Peng Fan <Peng.Fan@freescale.com> |
mxc: ocotp fix hole in shadow registers There is a hole in shadow registers address map of size 0x100 between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL. Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses, we should account for this hole in address space. Similar hole exists between bank 14 and bank 15 of size 0x80 on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX. Note: iMX6SL has only 0-7 banks and there is no hole. Note: iMX6UL doesn't have this one. When reading, we use register offset, so need to account for holes to get the correct address. When writing, we use bank/word index, there is no need to account for holes, always use bank/word index from fuse map. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> |
#
42c91c10 |
|
11-Aug-2015 |
Adrian Alonso <aalonso@freescale.com> |
imx: ocotp: mxc add i.MX7D support * Ocotp of i.MX7D has different operation rule. This patch is to add support for i.MX7D ocotp. Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com> |
#
a847fff1 |
|
25-Nov-2014 |
Fabio Estevam <fabio.estevam@freescale.com> |
mxc_ocotp: Do not disable the OCOTP clock after every access Leave the OCOTP turned on, so that we subsequent access do not fail. After enabling the thermal driver on a mx6sxsabresd board: U-Boot 2015.01-rc1-18267-g99d4189-dirty (Nov 24 2014 - 12:59:01) CPU: Freescale i.MX6SX rev1.0 at 792 MHz CPU: Temperature 48 C Reset cause: POR Board: MX6SX SABRE SDB I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 00:01.0 - 16c3:abcd - Bridge device 01:00.0 - 8086:08b1 - Network controller In: serial Out: serial Err: serial Net: (hang) As the thermal driver accesses the ocotp registers, its clock will be disabled afterwards. Then when the MAC address is read (also from ocotp registers) it will cause a hang. Do not disable the ocotp clock to prevent this problem. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> |
#
4515992f |
|
06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
replace DIV_ROUND with DIV_ROUND_CLOSEST The Linux-compatible macro DIV_ROUND_CLOSEST is a bit more flexible and safer than DIV_ROUND. For example, foo = DIV_ROUND_CLOSEST(x, y++) works expectedly, but foo = DIV_ROUND(x, y++) does not. (y is incremented twice.) Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
112fd2ec |
|
23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
Add mxc_ocotp driver Add an mxc_ocotp driver for i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
c05ed00a |
|
10-May-2020 |
Simon Glass <sjg@chromium.org> |
common: Drop linux/delay.h from common header Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
67f3f32c |
|
23-Dec-2019 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: support i.MX8MP i.MX8MP use similar ocotp as i.MX8MN, but has changed fuse banks and ctrl register bit definitions, so update to reflect that. Reviewed-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
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#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
b3cf86c8 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Disable fuse sense for imx8mq B1 On iMX8MQ Rev B1, reading from fuse box is not allowed. The OCOTP_READ_FUSE_DATA register is tied to magic number 0xff0055aa for chip rev. So u-boot has to disable the fuse sense function for it. Signed-off-by: Ye Li <ye.li@nxp.com> Tested-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
112ad600 |
|
17-Apr-2019 |
Ye Li <ye.li@nxp.com> |
mxc_ocotp: Update redundancy banks for mx7ulp B0 On mx7ulp B0, beside bank 0 and 1, the fuse bank 9, 10, 28 are changed to Redundancy mode not ECC, so they can support to program different bits of a word in multiple times. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
|
#
cd357ad1 |
|
20-Nov-2018 |
Peng Fan <peng.fan@nxp.com> |
imx: rename mx8m,MX8M to imx8m,IMX8M Rename mx8m,MX8M to imx8m,IMX8M Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Jon Nettleton <jon@solid-run.com>
|
#
83d290c5 |
|
06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
8a099b68 |
|
09-Jan-2018 |
Peng Fan <peng.fan@nxp.com> |
misc: ocotp: add i.MX8M support i.MX8M OCOTP follow same flow as i.MX6Q, but it has 64 banks and each bank 4 words. Signed-off-by: Peng Fan <peng.fan@nxp.com> Reviewed-by: Stefano Babic <sbabic@denx.de> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
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#
8df42bee |
|
02-Jan-2018 |
Peng Fan <peng.fan@nxp.com> |
misc: mxc_ocotp: check fuse word before programming on i.MX7ULP On i.MX7ULP, the fuse words (except bank 0 and 1) only supports to write once, because they use ECC mode. Multiple writes may damage the ECC value and cause a wrong fuse value decoded when reading. This patch adds a checking before the fuse word programming, only can write when the word value is 0. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
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#
552a848e |
|
29-Jun-2017 |
Stefano Babic <sbabic@denx.de> |
imx: reorganize IMX code as other SOCs Change is consistent with other SOCs and it is in preparation for adding SOMs. SOC's related files are moved from cpu/ to mach-imx/<SOC>. This change is also coherent with the structure in kernel. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@nxp.com> CC: Akshay Bhat <akshaybhat@timesys.com> CC: Ken Lin <Ken.Lin@advantech.com.tw> CC: Marek Vasut <marek.vasut@gmail.com> CC: Heiko Schocher <hs@denx.de> CC: "Sébastien Szymanski" <sebastien.szymanski@armadeus.com> CC: Christian Gmeiner <christian.gmeiner@gmail.com> CC: Stefan Roese <sr@denx.de> CC: Patrick Bruenn <p.bruenn@beckhoff.com> CC: Troy Kisky <troy.kisky@boundarydevices.com> CC: Nikita Kiryanov <nikita@compulab.co.il> CC: Otavio Salvador <otavio@ossystems.com.br> CC: "Eric Bénard" <eric@eukrea.com> CC: Jagan Teki <jagan@amarulasolutions.com> CC: Ye Li <ye.li@nxp.com> CC: Peng Fan <peng.fan@nxp.com> CC: Adrian Alonso <adrian.alonso@nxp.com> CC: Alison Wang <b18965@freescale.com> CC: Tim Harvey <tharvey@gateworks.com> CC: Martin Donnelly <martin.donnelly@ge.com> CC: Marcin Niestroj <m.niestroj@grinn-global.com> CC: Lukasz Majewski <lukma@denx.de> CC: Adam Ford <aford173@gmail.com> CC: "Albert ARIBAUD (3ADEV)" <albert.aribaud@3adev.fr> CC: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Soeren Moch <smoch@web.de> CC: Richard Hu <richard.hu@technexion.com> CC: Wig Cheng <wig.cheng@technexion.com> CC: Vanessa Maegima <vanessa.maegima@nxp.com> CC: Max Krummenacher <max.krummenacher@toradex.com> CC: Stefan Agner <stefan.agner@toradex.com> CC: Markus Niebel <Markus.Niebel@tq-group.com> CC: Breno Lima <breno.lima@nxp.com> CC: Francesco Montefoschi <francesco.montefoschi@udoo.org> CC: Jaehoon Chung <jh80.chung@samsung.com> CC: Scott Wood <oss@buserror.net> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Anatolij Gustschin <agust@denx.de> CC: Simon Glass <sjg@chromium.org> CC: "Andrew F. Davis" <afd@ti.com> CC: "Łukasz Majewski" <l.majewski@samsung.com> CC: Patrice Chotard <patrice.chotard@st.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> CC: Hans de Goede <hdegoede@redhat.com> CC: Masahiro Yamada <yamada.masahiro@socionext.com> CC: Stephen Warren <swarren@nvidia.com> CC: Andre Przywara <andre.przywara@arm.com> CC: "Álvaro Fernández Rojas" <noltari@gmail.com> CC: York Sun <york.sun@nxp.com> CC: Xiaoliang Yang <xiaoliang.yang@nxp.com> CC: Chen-Yu Tsai <wens@csie.org> CC: George McCollister <george.mccollister@gmail.com> CC: Sven Ebenfeld <sven.ebenfeld@gmail.com> CC: Filip Brozovic <fbrozovic@gmail.com> CC: Petr Kulhavy <brain@jikos.cz> CC: Eric Nelson <eric@nelint.com> CC: Bai Ping <ping.bai@nxp.com> CC: Anson Huang <Anson.Huang@nxp.com> CC: Sanchayan Maity <maitysanchayan@gmail.com> CC: Lokesh Vutla <lokeshvutla@ti.com> CC: Patrick Delaunay <patrick.delaunay@st.com> CC: Gary Bisson <gary.bisson@boundarydevices.com> CC: Alexander Graf <agraf@suse.de> CC: u-boot@lists.denx.de Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Christian Gmeiner <christian.gmeiner@gmail.com>
|
#
3ca0f0d2 |
|
22-Feb-2017 |
Peng Fan <peng.fan@nxp.com> |
mxc_ocotp: Update driver to support OCOTP controller on i.MX7ULP Update the mxc_ocotp driver to support i.MX7ULP. The read/write sequence has some changes due to PDN and OUT_STATUS registers added and TIME register is removed. Also update the bank size and number. Add is_mx7ulp macro in sys_proto.h Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by : Stefano Babic <sbabic@denx.de>
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#
b2ebdd85 |
|
11-Dec-2016 |
Peng Fan <peng.fan@nxp.com> |
OCOTP: Update OCOTP driver to support i.MX6SLL Add the i.MX6SLL support to OCOTP driver. The i.MX6SLL reuses the i.MX6ULL fuse, bank 7 and bank8 have 4 words each, and there is a hole between bank 5 and bank 6. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
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#
f8b95731 |
|
11-Aug-2016 |
Peng Fan <van.freenix@gmail.com> |
imx: ocotp: support i.MX6ULL i.MX6ULL has two 128 bits fuse banks, bank 7 and bank 8, while other banks use 256 bits. So we have to adjust the word and bank index when accessing the bank 8. When in command line `fuse read 8 0 1`, you can image `fuse read 7 4 1` in the ocotp driver implementation for 6ULL. When programming, we use word index, so need to fix bank7/8 programming for i.mx6ull. For example: fuse prog 8 3 1; The word index is (8 << 3 | 3) --> 67. But actully it should be (7 << 3 | 7) ---> 63. So fix it. Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
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#
1221ce45 |
|
20-Sep-2016 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
treewide: replace #include <asm/errno.h> with <linux/errno.h> Now, arch/${ARCH}/include/asm/errno.h and include/linux/errno.h have the same content. (both just wrap <asm-generic/errno.h>) Replace all include directives for <asm/errno.h> with <linux/errno.h>. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> [trini: Fixup include/clk.] Signed-off-by: Tom Rini <trini@konsulko.com>
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#
bff75503 |
|
23-May-2016 |
Peng Fan <van.freenix@gmail.com> |
ocotp: mxc: use simpler runtime cpu dection macros Use simpler runtime cpu dection macros. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de>
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#
7296a023 |
|
26-Aug-2015 |
Peng Fan <Peng.Fan@freescale.com> |
mxc: ocotp fix hole in shadow registers There is a hole in shadow registers address map of size 0x100 between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL. Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses, we should account for this hole in address space. Similar hole exists between bank 14 and bank 15 of size 0x80 on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX. Note: iMX6SL has only 0-7 banks and there is no hole. Note: iMX6UL doesn't have this one. When reading, we use register offset, so need to account for holes to get the correct address. When writing, we use bank/word index, there is no need to account for holes, always use bank/word index from fuse map. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
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#
42c91c10 |
|
11-Aug-2015 |
Adrian Alonso <aalonso@freescale.com> |
imx: ocotp: mxc add i.MX7D support * Ocotp of i.MX7D has different operation rule. This patch is to add support for i.MX7D ocotp. Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
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#
a847fff1 |
|
25-Nov-2014 |
Fabio Estevam <fabio.estevam@freescale.com> |
mxc_ocotp: Do not disable the OCOTP clock after every access Leave the OCOTP turned on, so that we subsequent access do not fail. After enabling the thermal driver on a mx6sxsabresd board: U-Boot 2015.01-rc1-18267-g99d4189-dirty (Nov 24 2014 - 12:59:01) CPU: Freescale i.MX6SX rev1.0 at 792 MHz CPU: Temperature 48 C Reset cause: POR Board: MX6SX SABRE SDB I2C: ready DRAM: 1 GiB PMIC: PFUZE100 ID=0x10 MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2 00:01.0 - 16c3:abcd - Bridge device 01:00.0 - 8086:08b1 - Network controller In: serial Out: serial Err: serial Net: (hang) As the thermal driver accesses the ocotp registers, its clock will be disabled afterwards. Then when the MAC address is read (also from ocotp registers) it will cause a hang. Do not disable the ocotp clock to prevent this problem. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com>
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#
4515992f |
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06-Nov-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
replace DIV_ROUND with DIV_ROUND_CLOSEST The Linux-compatible macro DIV_ROUND_CLOSEST is a bit more flexible and safer than DIV_ROUND. For example, foo = DIV_ROUND_CLOSEST(x, y++) works expectedly, but foo = DIV_ROUND(x, y++) does not. (y is incremented twice.) Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
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1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
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112fd2ec |
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23-Apr-2013 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
Add mxc_ocotp driver Add an mxc_ocotp driver for i.MX6. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
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