#
65cc0e2a |
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16-Nov-2022 |
Tom Rini <trini@konsulko.com> |
global: Move remaining CONFIG_SYS_* to CFG_SYS_* The rest of the unmigrated CONFIG symbols in the CONFIG_SYS namespace do not easily transition to Kconfig. In many cases they likely should come from the device tree instead. Move these out of CONFIG namespace and in to CFG namespace. Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
4d3495de |
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12-Nov-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_NAND_MAX_OOBFREE et al to Kconfig This converts the following to Kconfig: CONFIG_SYS_NAND_MAX_OOBFREE CONFIG_SYS_NAND_MAX_ECCPOS Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
a918df21 |
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28-Oct-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_MAX_NAND_DEVICE to Kconfig This converts the following to Kconfig: CONFIG_SYS_MAX_NAND_DEVICE Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6115f1c4 |
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22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_NAND_OMAP_ECCSCHEME to Kconfig The values of CONFIG_NAND_OMAP_ECCSCHEME map to the enum in include/linux/mtd/omap_gpmc.h for valid ECC schemes. Make which one we will use be a choice statement, enumerating the ones which we have implemented. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c0ad62c5 |
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22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_NAND_ONFI_DETECTION to Kconfig This converts the following to Kconfig: CONFIG_SYS_NAND_ONFI_DETECTION Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a430fa06 |
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16-Aug-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: move NAND files into a raw/ subdirectory NAND flavors, like serial and parallel, have a lot in common and would benefit to share code. Let's move raw (parallel) NAND specific code in a raw/ subdirectory, to ease the addition of a core file in nand/ and the introduction of a spi/ subdirectory specific to SPI NANDs. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6ef2f901 |
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11-Aug-2017 |
Adam Ford <aford173@gmail.com> |
Convert CONFIG_BCH to Kconfig This converts the following to Kconfig: CONFIG_BCH Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
4dc34be4 |
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02-Oct-2016 |
Simon Glass <sjg@chromium.org> |
README: Fix CONFIG_SYS_NAND_MAX_DEVICE typo This should be CONFIG_SYS_MAX_NAND_DEVICE. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Scott Wood <oss@buserror.net> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
30780f94 |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Patch remaining places where nand_to_mtd() should be used Some drivers are still directly accessing the chip->mtd field. Patch them to use nand_to_mtd() instead. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> |
#
caad0d00 |
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13-Jun-2016 |
Fabian Mewes <architekt@coding4coffee.org> |
nand: doc: fix example ecc scheme calculation Signed-off-by: Fabian Mewes <architekt@coding4coffee.org> |
#
1866be7d |
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13-Jun-2016 |
Max Krummenacher <max.oss.09@gmail.com> |
nand: extend nand torture nand torture currently works on exactly one nand block which is specified by giving the byteoffset to the beginning of the block. Extend this by allowing for a second parameter specifying the byte size to be tested. e.g. ==> nand torture 1000000 NAND torture: device 0 offset 0x1000000 size 0x20000 (block size 0x20000) Passed: 1, failed: 0 ==> nand torture 1000000 40000 NAND torture: device 0 offset 0x1000000 size 0x40000 (block size 0x20000) Passed: 2, failed: 0 Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> [scottwood: fix usage to show size as optional, and add misssing braces] Signed-off-by: Scott Wood <oss@buserror.net> |
#
b616d9b0 |
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30-May-2016 |
Scott Wood <oss@buserror.net> |
nand: Embed mtd_info in struct nand_chip nand_info[] is now an array of pointers, with the actual mtd_info instance embedded in struct nand_chip. This is in preparation for syncing the NAND code with Linux 4.6, which makes the same change to struct nand_chip. It's in a separate commit due to the large amount of changes required to accommodate the change to nand_info[]. Signed-off-by: Scott Wood <oss@buserror.net> |
#
3f42dc87 |
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24-Nov-2015 |
Vagrant Cascadian <vagrant@debian.org> |
Fix typo: commmand -> command. Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
5519194d |
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08-May-2015 |
Stefan Agner <stefan@agner.ch> |
mtd: vf610_nfc: add Freescale NFC controller configs to Kconfig This commit allows users to enable/disable the Freescale NFC controller found in systems like Vybrid (VF610), MPC5125, MCF54418 or Kinetis K70 via Kconfig with more detailed help docs. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Stefano Babic <sbabic@denx.de> [scottwood: updated vf610twr_nand_defconfig] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
aff092ed |
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03-Feb-2015 |
Peter Tyser <ptyser@xes-inc.com> |
nand: Remove unused CONFIG_MTD_NAND_ECC_JFFS2 option This option was removed along with legacy NAND support in be33b046b549ad88c204c209508cd7657232ffbd. Clean up some remnants. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
#
c316f577 |
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25-Jun-2014 |
Daniel Mack <zonque@gmail.com> |
mtd: OMAP: Enable GPMC prefetch mode Enable GPMC's prefetch feature for NAND access. This speeds up NAND read access a lot by pre-fetching contents in the background and reading them through the FIFO address. The current implementation has two limitations: a) it only works in 8-bit mode b) it only supports read access Both is easily fixable by someone who has hardware to implement it. Note that U-Boot code uses non word-aligned buffers to read data into, and request read lengths that are not multiples of 4, so both partial buffers (head and tail) have to be addressed. Tested on AM335x hardware. Tested-by: Guido Martínez <guido@vanguardiasur.com.ar> Reviewed-by: Guido Martínez <guido@vanguardiasur.com.ar> Signed-off-by: Daniel Mack <zonque@gmail.com> [trini: Make apply again, use 'cs' fix pointed out by Guido] Signed-off-by: Tom Rini <trini@ti.com> |
#
4b0abf9f |
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03-Oct-2014 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mtd: denali: add Denali controller configs to Kconfig Commit 3eb3e72a3f66 (nand/denali: Adding Denali NAND driver support) introduced some new options, and some of them were documented by commit f9860cf081ef (nand/denali: Document CONFIG symbols). This commit allows users to enable/disable them via Kconfig with more detailed help docs. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Chin Liang See <clsee@altera.com> Cc: Scott Wood <scottwood@freescale.com> |
#
f9860cf0 |
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25-Sep-2014 |
Scott Wood <scottwood@freescale.com> |
nand/denali: Document CONFIG symbols The patch "nand/denali: Adding Denali NAND driver support" introduced two config symbols without documenting them. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Chin Liang See <clsee@altera.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
434f2cfc |
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18-Jul-2014 |
pekon gupta <pekon@ti.com> |
ARM: omap: move board specific NAND configs out from ti_armv7_common.h This patch moves some board specific NAND configs: - FROM: generic config file 'ti_armv7_common.h' - TO: individual board config files using these configs. So that each board can independently set the value as per its design. Following configs are affected in this patch: CONFIG_SYS_NAND_U_BOOT_OFFS: <refer doc/README.nand> CONFIG_CMD_SPL_NAND_OFS: <refer doc/README.falcon> CONFIG_SYS_NAND_SPL_KERNEL_OFFS: <refer doc/README.falcon> CONFIG_CMD_SPL_WRITE_SIZE: <refer doc/README.falcon> This patch also updates documentation for few of above NAND configs. Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
867f0304 |
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02-Jun-2014 |
pekon gupta <pekon@ti.com> |
am335x: update README for BCH16 updates documentation with explanation on how to select ECC schemes. Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
b80a6603 |
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05-May-2014 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: add CONFIG_SYS_NAND_BUSWIDTH_16BIT to indicate NAND device bus-width GPMC controller needs to be configured based on bus-width of the NAND device connected to it. Also, dynamic detection of NAND bus-width from on-chip ONFI parameters is not possible in following situations: SPL: SPL NAND drivers does not support ONFI parameter reading. U-boot: GPMC controller iniitalization is done in omap_gpmc.c:board_nand_init() which is called before probing for devices, hence any ONFI parameter information is not available during GPMC initialization. Thus, OMAP NAND driver expected board developers to explicitely write GPMC configurations specific to NAND device attached on board in board files itself. But this was troublesome for board manufacturers as they need to dive into lengthy platform & SoC documents to find details of GPMC registers and appropriate configurations to get NAND device working. This patch instead adds existing CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config hich indicates that connected NAND device has x16 bus-width. And then based on this config GPMC driver itself initializes itself based on NAND bus-width. This keeps board developers free from knowing GPMC controller specific internals. Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
3f719069 |
|
18-Nov-2013 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: add CONFIG_NAND_OMAP_ECCSCHEME for selection of ecc-scheme This patch adds new CONFIG_NAND_OMAP_ECCSCHEME, replacing other distributed CONFIG_xx used for selecting NAND ecc-schemes. This patch aims at solving following issues. 1) Currently ecc-scheme is tied to SoC platform, which prevents user to select other ecc-schemes also supported in hardware. like; - most of OMAP3 SoC platforms use only 1-bit Hamming ecc-scheme, inspite the fact that they can use higher ecc-schemes like 8-bit ecc-schemes with software based error detection (OMAP_ECC_BCH4_CODE_HW_DETECTION_SW). - most of AM33xx SoC plaforms use 8-bit BCH ecc-scheme for now, but hardware supports BCH16 ecc-scheme also. 2) Different platforms use different CONFIG_xx to select ecc-schemes, which adds confusion for user while migrating platforms. - *CONFIG_NAND_OMAP_ELM* which enables ELM hardware engine, selects only 8-bit BCH ecc-scheme with h/w based error-correction (OMAP_ECC_BCH8_CODE_HW) whereas ELM hardware engine supports other ecc-schemes also like; BCH4, and BCH16 (in future). - *CONFIG_NAND_OMAP_BCH8* selects 8-bit BCH ecc-scheme with s/w based error correction (OMAP_ECC_BCH8_CODE_HW_DETECTION_SW). - *CONFIG_SPL_NAND_SOFTECC* selects 1-bit Hamming ecc-scheme using s/w library Thus adding new *CONFIG_NAND_OMAP_ECCSCHEME* de-couples ecc-scheme dependency on SoC platform and NAND driver. And user can select ecc-scheme independently foreach board. However, selection some hardware based ecc-schemes (OMAP_ECC_BCHx_CODE_HW) still depends on presence of ELM hardware engine on SoC. (Refer doc/README.nand) Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
d016dc42 |
|
18-Nov-2013 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: enable BCH ECC scheme using ELM for generic platform BCH8_ECC scheme implemented in omap_gpmc.c driver has following favours +-----------------------------------+-----------------+-----------------+ |ECC Scheme | ECC Calculation | Error Detection | +-----------------------------------+-----------------+-----------------+ |OMAP_ECC_BCH8_CODE_HW |GPMC |ELM H/W engine | |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |GPMC |S/W BCH library | +-----------------------------------+-----------------+-----------------+ Current implementation limits the BCH8_CODE_HW only for AM33xx device family. (using CONFIG_AM33XX). However, other SoC families (like TI81xx) also have ELM hardware module, and can support ECC error detection using ELM. This patch - removes CONFIG_AM33xx Thus this driver can be reused by all devices having ELM h/w engine. - adds omap_select_ecc_scheme() A common function to handle ecc-scheme related configurations. This can be used both during device-probe and via user-space u-boot commads to change ecc-scheme. During device probe ecc-scheme is selected based on CONFIG_NAND_OMAP_ELM or CONFIG_NAND_OMAP_BCH8 - enables CONFIG_BCH S/W library (lib/bch.c) required by OMAP_ECC_BCHx_CODE_HW_DETECTION_SW is enabled by CONFIG_BCH. - enables CONFIG_SYS_NAND_ONFI_DETECTION for auto-detection of ONFI compliant NAND devices - updates following README doc doc/README.nand board/ti/am335x/README doc/README.omap3 Signed-off-by: Pekon Gupta <pekon@ti.com> [scottwood@freescale.com: fixed unused variable warning] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
beba5f04 |
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18-Nov-2013 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: make am33xx/elm.c as common driver for all OMAPx and AMxxxx platforms ELM hardware engine which is used for ECC error detection, is present on all latest OMAP SoC (like OMAP4xxx, OMAP5xxx, DRA7xxx, AM33xx, AM43xx). Thus ELM driver should be moved to common drivers/mtd/nand/ folder so that all SoC having on-chip ELM hardware engine can re-use it. This patch has following changes: - mv arch/arm/include/asm/arch-am33xx/elm.h arch/arm/include/asm/omap_elm.h - mv arch/arm/cpu/armv7/am33xx/elm.c drivers/mtd/nand/omap_elm.c - update Makefiles - update #include <asm/elm.h> - add CONFIG_NAND_OMAP_ELM to compile driver/mtd/nand/omap_elm.c and include in all board configs using AM33xx SoC platform. Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
68ec9c85 |
|
04-Oct-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
mtd: move & update nand_ecclayout structure (plus board changes) nand_ecclayout is present in mtd.h at Linux. Move this structure to mtd.h to comply with Linux. Also, increase the ecc placement locations to 640 to suport device having writesize/oobsize of 8KB/640B. This means that the maximum oobsize has gone up to 640 bytes and consequently the maximum ecc placement locations have also gone up to 640. Changes from Prabhabkar's version (squashed into one patch to preserve bisectability): - Added _LARGE to MTD_MAX_*_ENTRIES This makes the names match current Linux source, and resolves a conflict between http://patchwork.ozlabs.org/patch/280488/ and http://patchwork.ozlabs.org/patch/284513/ The former was posted first and is closer to matching Linux, but unlike Linux it does not add _LARGE to the names. The second adds _LARGE to one of the names, and depends on it in a subsequent patch (http://patchwork.ozlabs.org/patch/284512/). - Made max oobfree/eccpos configurable, and used this on tricorder, alpr, ASH405, T4160QDS, and T4240QDS (these boards failed to build for me without doing so, due to a size increase). On tricorder SPL, this saves 2576 bytes (and makes the SPL build again) versus the new default of 640 eccpos and 32 oobfree, and saves 336 bytes versus the old default of 128 eccpos and 8 oobfree. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> CC: Vipin Kumar <vipin.kumar@st.com> [scottwood@freescale.com: changes as described above] Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Thomas Weber <weber@corscience.de> Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Cc: Stefan Roese <sr@denx.de> Cc: York Sun <yorksun@freescale.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
3287f6d3 |
|
16-Nov-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
nand: Add torture feature This patch adds a NAND Flash torture feature, which is useful as a block stress test to determine if a block is still good and reliable (or should be marked as bad), e.g. after a write error. This code is ported from mtd-utils' lib/libmtd.c. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> [scottwood@freescale.com: removed unnec. ifdef and unwrapped error strings] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
eee623a5 |
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22-Aug-2012 |
Joe Hershberger <joe.hershberger@ni.com> |
nand: Add support for unlock.invert NAND unlock command allows an invert bit to be set to unlock all but the selected page range. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> [scottwood@freescale.com: updated docs and added comment about invert bit] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
418396e2 |
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02-Mar-2012 |
Scott Wood <scottwood@freescale.com> |
nand: extend .raw accesses to work on multiple pages A use for this is to read, modify, erase, and write an entire block as a single unit, as a replacement for the biterr command. This way gives more flexibility in that you can also test multiple bit errors, errors in the ECC, etc. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
578931b3 |
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12-Jan-2012 |
Scott Wood <scottwood@freescale.com> |
nand: Introduce CONFIG_SYS_NAND_SELF_INIT This allows a driver to run code between nand_scan_ident() and nand_scan_tail(), among other things. See the additions to doc/README.nand for details. To allow a gradual transition, Boards that don't set CONFIG_SYS_NAND_SELF_INIT will still be initialized the old way, but new drivers should not require this, and existing drivers should be converted when convenient. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
fb3659ac |
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23-Sep-2011 |
Marek Vasut <marex@denx.de> |
NAND: Add nand read.raw and write.raw commands These commands should work around various "hardware" ECC and BCH methods. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> [scottwood@freescale.com: s/write the page/access the page/] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
c9494866 |
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14-Jun-2011 |
Ben Gardiner <bengardiner@nanometrics.ca> |
cmd_nand: add nand write.trimffs command Add another nand write. variant, trimffs. This command will request of nand_write_skip_bad() that all trailing all-0xff pages will be dropped from eraseblocks when they are written to flash as-per the reccommended behaviour of the UBI FAQ [1]. The function that implements this timming is the drop_ffs() function by Artem Bityutskiy, ported from the mtd-utils tree. [1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Artem Bityutskiy <dedekind1@gmail.com> CC: Detlev Zundel <dzu@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
be33b046 |
|
01-Apr-2009 |
Scott Wood <scottwood@freescale.com> |
Remove legacy NAND and disk on chip code. Legacy NAND had been scheduled for removal. Any boards that use this were already not building in the previous release due to an #error. The disk on chip code in common/cmd_doc.c relies on legacy NAND, and it has also been removed. There is newer disk on chip code in drivers/mtd/nand; someone with access to hardware and sufficient time and motivation can try to get that working, but for now disk on chip is not supported. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
6e29ed8e |
|
28-Apr-2009 |
David Brownell <dbrownell@users.sourceforge.net> |
davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC) Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option. It's not just nasty; it's also unused by any current boards, and doesn't even match the main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC on newer chips that support it). DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30, match non-BROKEN code paths for 1-bit HW ECC. The BROKEN code paths do seem to partially match what MontaVista/TI kernels (4.0/2.6.10, and 5.0/2.6.18) do ... but only for small pages. Large page support is really broken (and it's unclear just what software it was trying to match!), and the ECC layout was making three more bytes available for use by filesystem (or whatever) code. Since this option itself seems broken, remove it. Add a comment about the MV/TI compat issue, and the most straightforward way to address it (should someone really need to solve it). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
99067b08 |
|
01-Apr-2009 |
Scott Wood <scottwood@freescale.com> |
Noisily disable the legacy NAND subsystem. Legacy NAND is marked for feature removal after April 2009 (i.e. this upcoming release). There are still several boards that reference it (though many do so only for disk-on-chip support which has been silently disabled for a while now). These boards will now fail to build with #error, though the code is still there if the user removes #error. The plan is to remove the code outright in the next release, along with any board code that refers to it (such as board/esd/common/auto_update.c). Also, remove the legacy NAND API description from README.nand. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
6c869637 |
|
16-Jan-2009 |
Wolfgang Grandegger <wg@grandegger.com> |
NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and changes the default from 8 to 1 for the legacy and the new MTD NAND layer. This allows to remove all NAND_MAX_CHIPS definitions in the board config files because none of the boards use multi chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 define #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE but that's bogus and did not work anyhow. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
6d0f6bcf |
|
16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
9b05aa78 |
|
30-Aug-2008 |
Hugo Villeneuve <hugo.villeneuve@lyrtech.com> |
ARM DaVinci: Fix broken HW ECC for large page NAND. Based on original patch by Bernard Blackham <bernard@largestprime.net> U-boot's HW ECC support for large page NAND on Davinci is completely broken. Some kernels, such as the 2.6.10 one supported by MontaVista for DaVinci, rely upon this broken behaviour as they share the same code for ECCs. In the existing scheme, error detection *might* work on large page, but error correction definitely does not. Small page ECC correction works, but the format is not compatible with the mainline git kernel. This patch adds ECC code that matches what is currently in the Davinci git repository (since NAND support was added in 2.6.24). This makes the ECC and OOB layout written by u-boot compatible with Linux for both small page and large page devices and fixes ECC correction for large page devices. The old behaviour can be restored by defining the macro CFG_DAVINCI_BROKEN_ECC, which is undefined by default. Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com> Acked-by: Sergey Kubushyn <ksi@koi8.net> Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
cc4a0cee |
|
12-Aug-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
drivers/mtd/nand: Move conditional compilation to Makefile rename CFG_NAND_LEGACY to CONFIG_NAND_LEGACY Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
984e03cd |
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12-Jun-2008 |
Scott Wood <scottwood@freescale.com> |
NAND: Always skip blocks on read/write/boot. Use of the non-skipping versions was almost always (if not always) an error, and no valid use case has been identified. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
10c7382b |
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29-Dec-2007 |
Marcel Ziswiler <marcel@ziswiler.com> |
fix various comments Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> |
#
b5501f7d |
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09-Jul-2007 |
Jon Loeliger <jdl@freescale.com> |
Update README.* to reference new CONFIG_CMD_* names now. Signed-off-by: Jon Loeliger <jdl@freescale.com> |
#
323bfa8f |
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22-Apr-2007 |
Stefan Roese <sr@denx.de> |
Remove BOARDLIBS usage completely Signed-off-by: Stefan Roese <sr@denx.de> |
#
856f0544 |
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28-Oct-2006 |
Stefan Roese <sr@denx.de> |
[PATCH] NAND: Partition name support added to NAND subsystem chpart, nboot and NAND subsystem related commands now accept also partition name to specify offset. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Stefan Roese <sr@denx.de> |
#
fcfed4f2 |
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18-Oct-2006 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup. |
#
2255b2d2 |
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09-Oct-2006 |
Stefan Roese <sr@denx.de> |
* Several improvements to the new NAND subsystem: - JFFS2 related commands implemented in mtd-utils style - Support for bad blocks - Bad block testing commands - NAND lock commands Please take a look at doc/README.nand for more details Patch by Guido Classen, 10 Oct 2006 |
#
bfc81252 |
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06-Mar-2006 |
Wolfgang Denk <wd@denx.de> |
Minor code cleanup |
#
4e3ccd26 |
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06-Mar-2006 |
Wolfgang Denk <wd@denx.de> |
Merge the new NAND code (testing-NAND brach); see doc/README.nand Rewrite of NAND code based on what is in 2.6.12 Linux kernel Patch by Ladislav Michl, 29 Jun 2005 [Merge with /home/tur/nand/u-boot]
|
#
8bde7f77 |
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27-Jun-2003 |
Wolfgang Denk <wd@denx.de> |
* Code cleanup: - remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen) |
#
7a8e9bed |
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31-May-2003 |
Wolfgang Denk <wd@denx.de> |
* Patch by Marc Singer, 29 May 2003: Fixed rarp boot method for IA32 and other little-endian CPUs. * Patch by Marc Singer, 28 May 2003: Added port I/O commands. * Patch by Matthew McClintock, 28 May 2003 - cpu/mpc824x/start.S: fix relocation code when booting from RAM - minor patches for utx8245 * Patch by Daniel Engstr�m, 28 May 2003: x86 update * Patch by Dave Ellis, 9 May 2003 + 27 May 2003: add nand flash support to SXNI855T configuration fix/extend nand flash support: - fix 'nand erase' command so does not erase bad blocks - fix 'nand write' command so does not write to bad blocks - fix nand_probe() so handles no flash detected properly - add doc/README.nand - add .jffs2 and .oob options to nand read/write - add 'nand bad' command to list bad blocks - add 'clean' option to 'nand erase' to write JFFS2 clean markers - make NAND read/write faster * Patch by Rune Torgersen, 23 May 2003: Update for MPC8266ADS board |
#
a918df21 |
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28-Oct-2022 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_MAX_NAND_DEVICE to Kconfig This converts the following to Kconfig: CONFIG_SYS_MAX_NAND_DEVICE Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
#
6115f1c4 |
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22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_NAND_OMAP_ECCSCHEME to Kconfig The values of CONFIG_NAND_OMAP_ECCSCHEME map to the enum in include/linux/mtd/omap_gpmc.h for valid ECC schemes. Make which one we will use be a choice statement, enumerating the ones which we have implemented. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c0ad62c5 |
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22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_NAND_ONFI_DETECTION to Kconfig This converts the following to Kconfig: CONFIG_SYS_NAND_ONFI_DETECTION Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a430fa06 |
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16-Aug-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: move NAND files into a raw/ subdirectory NAND flavors, like serial and parallel, have a lot in common and would benefit to share code. Let's move raw (parallel) NAND specific code in a raw/ subdirectory, to ease the addition of a core file in nand/ and the introduction of a spi/ subdirectory specific to SPI NANDs. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6ef2f901 |
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11-Aug-2017 |
Adam Ford <aford173@gmail.com> |
Convert CONFIG_BCH to Kconfig This converts the following to Kconfig: CONFIG_BCH Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
4dc34be4 |
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02-Oct-2016 |
Simon Glass <sjg@chromium.org> |
README: Fix CONFIG_SYS_NAND_MAX_DEVICE typo This should be CONFIG_SYS_MAX_NAND_DEVICE. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Scott Wood <oss@buserror.net> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
30780f94 |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Patch remaining places where nand_to_mtd() should be used Some drivers are still directly accessing the chip->mtd field. Patch them to use nand_to_mtd() instead. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> |
#
caad0d00 |
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13-Jun-2016 |
Fabian Mewes <architekt@coding4coffee.org> |
nand: doc: fix example ecc scheme calculation Signed-off-by: Fabian Mewes <architekt@coding4coffee.org> |
#
1866be7d |
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13-Jun-2016 |
Max Krummenacher <max.oss.09@gmail.com> |
nand: extend nand torture nand torture currently works on exactly one nand block which is specified by giving the byteoffset to the beginning of the block. Extend this by allowing for a second parameter specifying the byte size to be tested. e.g. ==> nand torture 1000000 NAND torture: device 0 offset 0x1000000 size 0x20000 (block size 0x20000) Passed: 1, failed: 0 ==> nand torture 1000000 40000 NAND torture: device 0 offset 0x1000000 size 0x40000 (block size 0x20000) Passed: 2, failed: 0 Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> [scottwood: fix usage to show size as optional, and add misssing braces] Signed-off-by: Scott Wood <oss@buserror.net> |
#
b616d9b0 |
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30-May-2016 |
Scott Wood <oss@buserror.net> |
nand: Embed mtd_info in struct nand_chip nand_info[] is now an array of pointers, with the actual mtd_info instance embedded in struct nand_chip. This is in preparation for syncing the NAND code with Linux 4.6, which makes the same change to struct nand_chip. It's in a separate commit due to the large amount of changes required to accommodate the change to nand_info[]. Signed-off-by: Scott Wood <oss@buserror.net> |
#
3f42dc87 |
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24-Nov-2015 |
Vagrant Cascadian <vagrant@debian.org> |
Fix typo: commmand -> command. Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
5519194d |
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08-May-2015 |
Stefan Agner <stefan@agner.ch> |
mtd: vf610_nfc: add Freescale NFC controller configs to Kconfig This commit allows users to enable/disable the Freescale NFC controller found in systems like Vybrid (VF610), MPC5125, MCF54418 or Kinetis K70 via Kconfig with more detailed help docs. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Stefano Babic <sbabic@denx.de> [scottwood: updated vf610twr_nand_defconfig] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
aff092ed |
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03-Feb-2015 |
Peter Tyser <ptyser@xes-inc.com> |
nand: Remove unused CONFIG_MTD_NAND_ECC_JFFS2 option This option was removed along with legacy NAND support in be33b046b549ad88c204c209508cd7657232ffbd. Clean up some remnants. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
#
c316f577 |
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25-Jun-2014 |
Daniel Mack <zonque@gmail.com> |
mtd: OMAP: Enable GPMC prefetch mode Enable GPMC's prefetch feature for NAND access. This speeds up NAND read access a lot by pre-fetching contents in the background and reading them through the FIFO address. The current implementation has two limitations: a) it only works in 8-bit mode b) it only supports read access Both is easily fixable by someone who has hardware to implement it. Note that U-Boot code uses non word-aligned buffers to read data into, and request read lengths that are not multiples of 4, so both partial buffers (head and tail) have to be addressed. Tested on AM335x hardware. Tested-by: Guido Martínez <guido@vanguardiasur.com.ar> Reviewed-by: Guido Martínez <guido@vanguardiasur.com.ar> Signed-off-by: Daniel Mack <zonque@gmail.com> [trini: Make apply again, use 'cs' fix pointed out by Guido] Signed-off-by: Tom Rini <trini@ti.com> |
#
4b0abf9f |
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03-Oct-2014 |
Masahiro Yamada <yamada.masahiro@socionext.com> |
mtd: denali: add Denali controller configs to Kconfig Commit 3eb3e72a3f66 (nand/denali: Adding Denali NAND driver support) introduced some new options, and some of them were documented by commit f9860cf081ef (nand/denali: Document CONFIG symbols). This commit allows users to enable/disable them via Kconfig with more detailed help docs. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Chin Liang See <clsee@altera.com> Cc: Scott Wood <scottwood@freescale.com> |
#
f9860cf0 |
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25-Sep-2014 |
Scott Wood <scottwood@freescale.com> |
nand/denali: Document CONFIG symbols The patch "nand/denali: Adding Denali NAND driver support" introduced two config symbols without documenting them. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Chin Liang See <clsee@altera.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
434f2cfc |
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18-Jul-2014 |
pekon gupta <pekon@ti.com> |
ARM: omap: move board specific NAND configs out from ti_armv7_common.h This patch moves some board specific NAND configs: - FROM: generic config file 'ti_armv7_common.h' - TO: individual board config files using these configs. So that each board can independently set the value as per its design. Following configs are affected in this patch: CONFIG_SYS_NAND_U_BOOT_OFFS: <refer doc/README.nand> CONFIG_CMD_SPL_NAND_OFS: <refer doc/README.falcon> CONFIG_SYS_NAND_SPL_KERNEL_OFFS: <refer doc/README.falcon> CONFIG_CMD_SPL_WRITE_SIZE: <refer doc/README.falcon> This patch also updates documentation for few of above NAND configs. Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
867f0304 |
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02-Jun-2014 |
pekon gupta <pekon@ti.com> |
am335x: update README for BCH16 updates documentation with explanation on how to select ECC schemes. Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
b80a6603 |
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05-May-2014 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: add CONFIG_SYS_NAND_BUSWIDTH_16BIT to indicate NAND device bus-width GPMC controller needs to be configured based on bus-width of the NAND device connected to it. Also, dynamic detection of NAND bus-width from on-chip ONFI parameters is not possible in following situations: SPL: SPL NAND drivers does not support ONFI parameter reading. U-boot: GPMC controller iniitalization is done in omap_gpmc.c:board_nand_init() which is called before probing for devices, hence any ONFI parameter information is not available during GPMC initialization. Thus, OMAP NAND driver expected board developers to explicitely write GPMC configurations specific to NAND device attached on board in board files itself. But this was troublesome for board manufacturers as they need to dive into lengthy platform & SoC documents to find details of GPMC registers and appropriate configurations to get NAND device working. This patch instead adds existing CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config hich indicates that connected NAND device has x16 bus-width. And then based on this config GPMC driver itself initializes itself based on NAND bus-width. This keeps board developers free from knowing GPMC controller specific internals. Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
3f719069 |
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18-Nov-2013 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: add CONFIG_NAND_OMAP_ECCSCHEME for selection of ecc-scheme This patch adds new CONFIG_NAND_OMAP_ECCSCHEME, replacing other distributed CONFIG_xx used for selecting NAND ecc-schemes. This patch aims at solving following issues. 1) Currently ecc-scheme is tied to SoC platform, which prevents user to select other ecc-schemes also supported in hardware. like; - most of OMAP3 SoC platforms use only 1-bit Hamming ecc-scheme, inspite the fact that they can use higher ecc-schemes like 8-bit ecc-schemes with software based error detection (OMAP_ECC_BCH4_CODE_HW_DETECTION_SW). - most of AM33xx SoC plaforms use 8-bit BCH ecc-scheme for now, but hardware supports BCH16 ecc-scheme also. 2) Different platforms use different CONFIG_xx to select ecc-schemes, which adds confusion for user while migrating platforms. - *CONFIG_NAND_OMAP_ELM* which enables ELM hardware engine, selects only 8-bit BCH ecc-scheme with h/w based error-correction (OMAP_ECC_BCH8_CODE_HW) whereas ELM hardware engine supports other ecc-schemes also like; BCH4, and BCH16 (in future). - *CONFIG_NAND_OMAP_BCH8* selects 8-bit BCH ecc-scheme with s/w based error correction (OMAP_ECC_BCH8_CODE_HW_DETECTION_SW). - *CONFIG_SPL_NAND_SOFTECC* selects 1-bit Hamming ecc-scheme using s/w library Thus adding new *CONFIG_NAND_OMAP_ECCSCHEME* de-couples ecc-scheme dependency on SoC platform and NAND driver. And user can select ecc-scheme independently foreach board. However, selection some hardware based ecc-schemes (OMAP_ECC_BCHx_CODE_HW) still depends on presence of ELM hardware engine on SoC. (Refer doc/README.nand) Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
d016dc42 |
|
18-Nov-2013 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: enable BCH ECC scheme using ELM for generic platform BCH8_ECC scheme implemented in omap_gpmc.c driver has following favours +-----------------------------------+-----------------+-----------------+ |ECC Scheme | ECC Calculation | Error Detection | +-----------------------------------+-----------------+-----------------+ |OMAP_ECC_BCH8_CODE_HW |GPMC |ELM H/W engine | |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |GPMC |S/W BCH library | +-----------------------------------+-----------------+-----------------+ Current implementation limits the BCH8_CODE_HW only for AM33xx device family. (using CONFIG_AM33XX). However, other SoC families (like TI81xx) also have ELM hardware module, and can support ECC error detection using ELM. This patch - removes CONFIG_AM33xx Thus this driver can be reused by all devices having ELM h/w engine. - adds omap_select_ecc_scheme() A common function to handle ecc-scheme related configurations. This can be used both during device-probe and via user-space u-boot commads to change ecc-scheme. During device probe ecc-scheme is selected based on CONFIG_NAND_OMAP_ELM or CONFIG_NAND_OMAP_BCH8 - enables CONFIG_BCH S/W library (lib/bch.c) required by OMAP_ECC_BCHx_CODE_HW_DETECTION_SW is enabled by CONFIG_BCH. - enables CONFIG_SYS_NAND_ONFI_DETECTION for auto-detection of ONFI compliant NAND devices - updates following README doc doc/README.nand board/ti/am335x/README doc/README.omap3 Signed-off-by: Pekon Gupta <pekon@ti.com> [scottwood@freescale.com: fixed unused variable warning] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
beba5f04 |
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18-Nov-2013 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: make am33xx/elm.c as common driver for all OMAPx and AMxxxx platforms ELM hardware engine which is used for ECC error detection, is present on all latest OMAP SoC (like OMAP4xxx, OMAP5xxx, DRA7xxx, AM33xx, AM43xx). Thus ELM driver should be moved to common drivers/mtd/nand/ folder so that all SoC having on-chip ELM hardware engine can re-use it. This patch has following changes: - mv arch/arm/include/asm/arch-am33xx/elm.h arch/arm/include/asm/omap_elm.h - mv arch/arm/cpu/armv7/am33xx/elm.c drivers/mtd/nand/omap_elm.c - update Makefiles - update #include <asm/elm.h> - add CONFIG_NAND_OMAP_ELM to compile driver/mtd/nand/omap_elm.c and include in all board configs using AM33xx SoC platform. Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
68ec9c85 |
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04-Oct-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
mtd: move & update nand_ecclayout structure (plus board changes) nand_ecclayout is present in mtd.h at Linux. Move this structure to mtd.h to comply with Linux. Also, increase the ecc placement locations to 640 to suport device having writesize/oobsize of 8KB/640B. This means that the maximum oobsize has gone up to 640 bytes and consequently the maximum ecc placement locations have also gone up to 640. Changes from Prabhabkar's version (squashed into one patch to preserve bisectability): - Added _LARGE to MTD_MAX_*_ENTRIES This makes the names match current Linux source, and resolves a conflict between http://patchwork.ozlabs.org/patch/280488/ and http://patchwork.ozlabs.org/patch/284513/ The former was posted first and is closer to matching Linux, but unlike Linux it does not add _LARGE to the names. The second adds _LARGE to one of the names, and depends on it in a subsequent patch (http://patchwork.ozlabs.org/patch/284512/). - Made max oobfree/eccpos configurable, and used this on tricorder, alpr, ASH405, T4160QDS, and T4240QDS (these boards failed to build for me without doing so, due to a size increase). On tricorder SPL, this saves 2576 bytes (and makes the SPL build again) versus the new default of 640 eccpos and 32 oobfree, and saves 336 bytes versus the old default of 128 eccpos and 8 oobfree. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> CC: Vipin Kumar <vipin.kumar@st.com> [scottwood@freescale.com: changes as described above] Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Thomas Weber <weber@corscience.de> Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Cc: Stefan Roese <sr@denx.de> Cc: York Sun <yorksun@freescale.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
3287f6d3 |
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16-Nov-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
nand: Add torture feature This patch adds a NAND Flash torture feature, which is useful as a block stress test to determine if a block is still good and reliable (or should be marked as bad), e.g. after a write error. This code is ported from mtd-utils' lib/libmtd.c. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> [scottwood@freescale.com: removed unnec. ifdef and unwrapped error strings] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
eee623a5 |
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22-Aug-2012 |
Joe Hershberger <joe.hershberger@ni.com> |
nand: Add support for unlock.invert NAND unlock command allows an invert bit to be set to unlock all but the selected page range. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> [scottwood@freescale.com: updated docs and added comment about invert bit] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
418396e2 |
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02-Mar-2012 |
Scott Wood <scottwood@freescale.com> |
nand: extend .raw accesses to work on multiple pages A use for this is to read, modify, erase, and write an entire block as a single unit, as a replacement for the biterr command. This way gives more flexibility in that you can also test multiple bit errors, errors in the ECC, etc. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
578931b3 |
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12-Jan-2012 |
Scott Wood <scottwood@freescale.com> |
nand: Introduce CONFIG_SYS_NAND_SELF_INIT This allows a driver to run code between nand_scan_ident() and nand_scan_tail(), among other things. See the additions to doc/README.nand for details. To allow a gradual transition, Boards that don't set CONFIG_SYS_NAND_SELF_INIT will still be initialized the old way, but new drivers should not require this, and existing drivers should be converted when convenient. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
fb3659ac |
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23-Sep-2011 |
Marek Vasut <marex@denx.de> |
NAND: Add nand read.raw and write.raw commands These commands should work around various "hardware" ECC and BCH methods. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> [scottwood@freescale.com: s/write the page/access the page/] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
c9494866 |
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14-Jun-2011 |
Ben Gardiner <bengardiner@nanometrics.ca> |
cmd_nand: add nand write.trimffs command Add another nand write. variant, trimffs. This command will request of nand_write_skip_bad() that all trailing all-0xff pages will be dropped from eraseblocks when they are written to flash as-per the reccommended behaviour of the UBI FAQ [1]. The function that implements this timming is the drop_ffs() function by Artem Bityutskiy, ported from the mtd-utils tree. [1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Artem Bityutskiy <dedekind1@gmail.com> CC: Detlev Zundel <dzu@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
be33b046 |
|
01-Apr-2009 |
Scott Wood <scottwood@freescale.com> |
Remove legacy NAND and disk on chip code. Legacy NAND had been scheduled for removal. Any boards that use this were already not building in the previous release due to an #error. The disk on chip code in common/cmd_doc.c relies on legacy NAND, and it has also been removed. There is newer disk on chip code in drivers/mtd/nand; someone with access to hardware and sufficient time and motivation can try to get that working, but for now disk on chip is not supported. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
6e29ed8e |
|
28-Apr-2009 |
David Brownell <dbrownell@users.sourceforge.net> |
davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC) Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option. It's not just nasty; it's also unused by any current boards, and doesn't even match the main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC on newer chips that support it). DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30, match non-BROKEN code paths for 1-bit HW ECC. The BROKEN code paths do seem to partially match what MontaVista/TI kernels (4.0/2.6.10, and 5.0/2.6.18) do ... but only for small pages. Large page support is really broken (and it's unclear just what software it was trying to match!), and the ECC layout was making three more bytes available for use by filesystem (or whatever) code. Since this option itself seems broken, remove it. Add a comment about the MV/TI compat issue, and the most straightforward way to address it (should someone really need to solve it). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
99067b08 |
|
01-Apr-2009 |
Scott Wood <scottwood@freescale.com> |
Noisily disable the legacy NAND subsystem. Legacy NAND is marked for feature removal after April 2009 (i.e. this upcoming release). There are still several boards that reference it (though many do so only for disk-on-chip support which has been silently disabled for a while now). These boards will now fail to build with #error, though the code is still there if the user removes #error. The plan is to remove the code outright in the next release, along with any board code that refers to it (such as board/esd/common/auto_update.c). Also, remove the legacy NAND API description from README.nand. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
6c869637 |
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16-Jan-2009 |
Wolfgang Grandegger <wg@grandegger.com> |
NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and changes the default from 8 to 1 for the legacy and the new MTD NAND layer. This allows to remove all NAND_MAX_CHIPS definitions in the board config files because none of the boards use multi chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 define #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE but that's bogus and did not work anyhow. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
6d0f6bcf |
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16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
9b05aa78 |
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30-Aug-2008 |
Hugo Villeneuve <hugo.villeneuve@lyrtech.com> |
ARM DaVinci: Fix broken HW ECC for large page NAND. Based on original patch by Bernard Blackham <bernard@largestprime.net> U-boot's HW ECC support for large page NAND on Davinci is completely broken. Some kernels, such as the 2.6.10 one supported by MontaVista for DaVinci, rely upon this broken behaviour as they share the same code for ECCs. In the existing scheme, error detection *might* work on large page, but error correction definitely does not. Small page ECC correction works, but the format is not compatible with the mainline git kernel. This patch adds ECC code that matches what is currently in the Davinci git repository (since NAND support was added in 2.6.24). This makes the ECC and OOB layout written by u-boot compatible with Linux for both small page and large page devices and fixes ECC correction for large page devices. The old behaviour can be restored by defining the macro CFG_DAVINCI_BROKEN_ECC, which is undefined by default. Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com> Acked-by: Sergey Kubushyn <ksi@koi8.net> Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
cc4a0cee |
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12-Aug-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
drivers/mtd/nand: Move conditional compilation to Makefile rename CFG_NAND_LEGACY to CONFIG_NAND_LEGACY Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
984e03cd |
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12-Jun-2008 |
Scott Wood <scottwood@freescale.com> |
NAND: Always skip blocks on read/write/boot. Use of the non-skipping versions was almost always (if not always) an error, and no valid use case has been identified. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
10c7382b |
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29-Dec-2007 |
Marcel Ziswiler <marcel@ziswiler.com> |
fix various comments Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> |
#
b5501f7d |
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09-Jul-2007 |
Jon Loeliger <jdl@freescale.com> |
Update README.* to reference new CONFIG_CMD_* names now. Signed-off-by: Jon Loeliger <jdl@freescale.com> |
#
323bfa8f |
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22-Apr-2007 |
Stefan Roese <sr@denx.de> |
Remove BOARDLIBS usage completely Signed-off-by: Stefan Roese <sr@denx.de> |
#
856f0544 |
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28-Oct-2006 |
Stefan Roese <sr@denx.de> |
[PATCH] NAND: Partition name support added to NAND subsystem chpart, nboot and NAND subsystem related commands now accept also partition name to specify offset. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Stefan Roese <sr@denx.de> |
#
fcfed4f2 |
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18-Oct-2006 |
Wolfgang Denk <wd@denx.de> |
Coding Style cleanup. |
#
2255b2d2 |
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09-Oct-2006 |
Stefan Roese <sr@denx.de> |
* Several improvements to the new NAND subsystem: - JFFS2 related commands implemented in mtd-utils style - Support for bad blocks - Bad block testing commands - NAND lock commands Please take a look at doc/README.nand for more details Patch by Guido Classen, 10 Oct 2006 |
#
bfc81252 |
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06-Mar-2006 |
Wolfgang Denk <wd@denx.de> |
Minor code cleanup |
#
4e3ccd26 |
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06-Mar-2006 |
Wolfgang Denk <wd@denx.de> |
Merge the new NAND code (testing-NAND brach); see doc/README.nand Rewrite of NAND code based on what is in 2.6.12 Linux kernel Patch by Ladislav Michl, 29 Jun 2005 [Merge with /home/tur/nand/u-boot]
|
#
8bde7f77 |
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27-Jun-2003 |
Wolfgang Denk <wd@denx.de> |
* Code cleanup: - remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen) |
#
7a8e9bed |
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31-May-2003 |
Wolfgang Denk <wd@denx.de> |
* Patch by Marc Singer, 29 May 2003: Fixed rarp boot method for IA32 and other little-endian CPUs. * Patch by Marc Singer, 28 May 2003: Added port I/O commands. * Patch by Matthew McClintock, 28 May 2003 - cpu/mpc824x/start.S: fix relocation code when booting from RAM - minor patches for utx8245 * Patch by Daniel Engstr�m, 28 May 2003: x86 update * Patch by Dave Ellis, 9 May 2003 + 27 May 2003: add nand flash support to SXNI855T configuration fix/extend nand flash support: - fix 'nand erase' command so does not erase bad blocks - fix 'nand write' command so does not write to bad blocks - fix nand_probe() so handles no flash detected properly - add doc/README.nand - add .jffs2 and .oob options to nand read/write - add 'nand bad' command to list bad blocks - add 'clean' option to 'nand erase' to write JFFS2 clean markers - make NAND read/write faster * Patch by Rune Torgersen, 23 May 2003: Update for MPC8266ADS board |
#
6115f1c4 |
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22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_NAND_OMAP_ECCSCHEME to Kconfig The values of CONFIG_NAND_OMAP_ECCSCHEME map to the enum in include/linux/mtd/omap_gpmc.h for valid ECC schemes. Make which one we will use be a choice statement, enumerating the ones which we have implemented. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
c0ad62c5 |
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22-Sep-2021 |
Tom Rini <trini@konsulko.com> |
Convert CONFIG_SYS_NAND_ONFI_DETECTION to Kconfig This converts the following to Kconfig: CONFIG_SYS_NAND_ONFI_DETECTION Signed-off-by: Tom Rini <trini@konsulko.com> |
#
a430fa06 |
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16-Aug-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: move NAND files into a raw/ subdirectory NAND flavors, like serial and parallel, have a lot in common and would benefit to share code. Let's move raw (parallel) NAND specific code in a raw/ subdirectory, to ease the addition of a core file in nand/ and the introduction of a spi/ subdirectory specific to SPI NANDs. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> |
#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> |
#
6ef2f901 |
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11-Aug-2017 |
Adam Ford <aford173@gmail.com> |
Convert CONFIG_BCH to Kconfig This converts the following to Kconfig: CONFIG_BCH Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> |
#
4dc34be4 |
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02-Oct-2016 |
Simon Glass <sjg@chromium.org> |
README: Fix CONFIG_SYS_NAND_MAX_DEVICE typo This should be CONFIG_SYS_MAX_NAND_DEVICE. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Scott Wood <oss@buserror.net> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com> |
#
30780f94 |
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15-Jun-2016 |
Boris Brezillon <bbrezillon@kernel.org> |
mtd: nand: Patch remaining places where nand_to_mtd() should be used Some drivers are still directly accessing the chip->mtd field. Patch them to use nand_to_mtd() instead. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> |
#
caad0d00 |
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13-Jun-2016 |
Fabian Mewes <architekt@coding4coffee.org> |
nand: doc: fix example ecc scheme calculation Signed-off-by: Fabian Mewes <architekt@coding4coffee.org> |
#
1866be7d |
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13-Jun-2016 |
Max Krummenacher <max.oss.09@gmail.com> |
nand: extend nand torture nand torture currently works on exactly one nand block which is specified by giving the byteoffset to the beginning of the block. Extend this by allowing for a second parameter specifying the byte size to be tested. e.g. ==> nand torture 1000000 NAND torture: device 0 offset 0x1000000 size 0x20000 (block size 0x20000) Passed: 1, failed: 0 ==> nand torture 1000000 40000 NAND torture: device 0 offset 0x1000000 size 0x40000 (block size 0x20000) Passed: 2, failed: 0 Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> [scottwood: fix usage to show size as optional, and add misssing braces] Signed-off-by: Scott Wood <oss@buserror.net> |
#
b616d9b0 |
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30-May-2016 |
Scott Wood <oss@buserror.net> |
nand: Embed mtd_info in struct nand_chip nand_info[] is now an array of pointers, with the actual mtd_info instance embedded in struct nand_chip. This is in preparation for syncing the NAND code with Linux 4.6, which makes the same change to struct nand_chip. It's in a separate commit due to the large amount of changes required to accommodate the change to nand_info[]. Signed-off-by: Scott Wood <oss@buserror.net> |
#
3f42dc87 |
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24-Nov-2015 |
Vagrant Cascadian <vagrant@debian.org> |
Fix typo: commmand -> command. Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com> |
#
5519194d |
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08-May-2015 |
Stefan Agner <stefan@agner.ch> |
mtd: vf610_nfc: add Freescale NFC controller configs to Kconfig This commit allows users to enable/disable the Freescale NFC controller found in systems like Vybrid (VF610), MPC5125, MCF54418 or Kinetis K70 via Kconfig with more detailed help docs. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Stefano Babic <sbabic@denx.de> [scottwood: updated vf610twr_nand_defconfig] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
aff092ed |
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03-Feb-2015 |
Peter Tyser <ptyser@xes-inc.com> |
nand: Remove unused CONFIG_MTD_NAND_ECC_JFFS2 option This option was removed along with legacy NAND support in be33b046b549ad88c204c209508cd7657232ffbd. Clean up some remnants. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> |
#
c316f577 |
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25-Jun-2014 |
Daniel Mack <zonque@gmail.com> |
mtd: OMAP: Enable GPMC prefetch mode Enable GPMC's prefetch feature for NAND access. This speeds up NAND read access a lot by pre-fetching contents in the background and reading them through the FIFO address. The current implementation has two limitations: a) it only works in 8-bit mode b) it only supports read access Both is easily fixable by someone who has hardware to implement it. Note that U-Boot code uses non word-aligned buffers to read data into, and request read lengths that are not multiples of 4, so both partial buffers (head and tail) have to be addressed. Tested on AM335x hardware. Tested-by: Guido Martínez <guido@vanguardiasur.com.ar> Reviewed-by: Guido Martínez <guido@vanguardiasur.com.ar> Signed-off-by: Daniel Mack <zonque@gmail.com> [trini: Make apply again, use 'cs' fix pointed out by Guido] Signed-off-by: Tom Rini <trini@ti.com> |
#
4b0abf9f |
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03-Oct-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
mtd: denali: add Denali controller configs to Kconfig Commit 3eb3e72a3f66 (nand/denali: Adding Denali NAND driver support) introduced some new options, and some of them were documented by commit f9860cf081ef (nand/denali: Document CONFIG symbols). This commit allows users to enable/disable them via Kconfig with more detailed help docs. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Chin Liang See <clsee@altera.com> Cc: Scott Wood <scottwood@freescale.com> |
#
f9860cf0 |
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25-Sep-2014 |
Scott Wood <scottwood@freescale.com> |
nand/denali: Document CONFIG symbols The patch "nand/denali: Adding Denali NAND driver support" introduced two config symbols without documenting them. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Chin Liang See <clsee@altera.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> |
#
434f2cfc |
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18-Jul-2014 |
pekon gupta <pekon@ti.com> |
ARM: omap: move board specific NAND configs out from ti_armv7_common.h This patch moves some board specific NAND configs: - FROM: generic config file 'ti_armv7_common.h' - TO: individual board config files using these configs. So that each board can independently set the value as per its design. Following configs are affected in this patch: CONFIG_SYS_NAND_U_BOOT_OFFS: <refer doc/README.nand> CONFIG_CMD_SPL_NAND_OFS: <refer doc/README.falcon> CONFIG_SYS_NAND_SPL_KERNEL_OFFS: <refer doc/README.falcon> CONFIG_CMD_SPL_WRITE_SIZE: <refer doc/README.falcon> This patch also updates documentation for few of above NAND configs. Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
867f0304 |
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02-Jun-2014 |
pekon gupta <pekon@ti.com> |
am335x: update README for BCH16 updates documentation with explanation on how to select ECC schemes. Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
b80a6603 |
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05-May-2014 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: add CONFIG_SYS_NAND_BUSWIDTH_16BIT to indicate NAND device bus-width GPMC controller needs to be configured based on bus-width of the NAND device connected to it. Also, dynamic detection of NAND bus-width from on-chip ONFI parameters is not possible in following situations: SPL: SPL NAND drivers does not support ONFI parameter reading. U-boot: GPMC controller iniitalization is done in omap_gpmc.c:board_nand_init() which is called before probing for devices, hence any ONFI parameter information is not available during GPMC initialization. Thus, OMAP NAND driver expected board developers to explicitely write GPMC configurations specific to NAND device attached on board in board files itself. But this was troublesome for board manufacturers as they need to dive into lengthy platform & SoC documents to find details of GPMC registers and appropriate configurations to get NAND device working. This patch instead adds existing CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config hich indicates that connected NAND device has x16 bus-width. And then based on this config GPMC driver itself initializes itself based on NAND bus-width. This keeps board developers free from knowing GPMC controller specific internals. Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
3f719069 |
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18-Nov-2013 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: add CONFIG_NAND_OMAP_ECCSCHEME for selection of ecc-scheme This patch adds new CONFIG_NAND_OMAP_ECCSCHEME, replacing other distributed CONFIG_xx used for selecting NAND ecc-schemes. This patch aims at solving following issues. 1) Currently ecc-scheme is tied to SoC platform, which prevents user to select other ecc-schemes also supported in hardware. like; - most of OMAP3 SoC platforms use only 1-bit Hamming ecc-scheme, inspite the fact that they can use higher ecc-schemes like 8-bit ecc-schemes with software based error detection (OMAP_ECC_BCH4_CODE_HW_DETECTION_SW). - most of AM33xx SoC plaforms use 8-bit BCH ecc-scheme for now, but hardware supports BCH16 ecc-scheme also. 2) Different platforms use different CONFIG_xx to select ecc-schemes, which adds confusion for user while migrating platforms. - *CONFIG_NAND_OMAP_ELM* which enables ELM hardware engine, selects only 8-bit BCH ecc-scheme with h/w based error-correction (OMAP_ECC_BCH8_CODE_HW) whereas ELM hardware engine supports other ecc-schemes also like; BCH4, and BCH16 (in future). - *CONFIG_NAND_OMAP_BCH8* selects 8-bit BCH ecc-scheme with s/w based error correction (OMAP_ECC_BCH8_CODE_HW_DETECTION_SW). - *CONFIG_SPL_NAND_SOFTECC* selects 1-bit Hamming ecc-scheme using s/w library Thus adding new *CONFIG_NAND_OMAP_ECCSCHEME* de-couples ecc-scheme dependency on SoC platform and NAND driver. And user can select ecc-scheme independently foreach board. However, selection some hardware based ecc-schemes (OMAP_ECC_BCHx_CODE_HW) still depends on presence of ELM hardware engine on SoC. (Refer doc/README.nand) Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
d016dc42 |
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18-Nov-2013 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: enable BCH ECC scheme using ELM for generic platform BCH8_ECC scheme implemented in omap_gpmc.c driver has following favours +-----------------------------------+-----------------+-----------------+ |ECC Scheme | ECC Calculation | Error Detection | +-----------------------------------+-----------------+-----------------+ |OMAP_ECC_BCH8_CODE_HW |GPMC |ELM H/W engine | |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |GPMC |S/W BCH library | +-----------------------------------+-----------------+-----------------+ Current implementation limits the BCH8_CODE_HW only for AM33xx device family. (using CONFIG_AM33XX). However, other SoC families (like TI81xx) also have ELM hardware module, and can support ECC error detection using ELM. This patch - removes CONFIG_AM33xx Thus this driver can be reused by all devices having ELM h/w engine. - adds omap_select_ecc_scheme() A common function to handle ecc-scheme related configurations. This can be used both during device-probe and via user-space u-boot commads to change ecc-scheme. During device probe ecc-scheme is selected based on CONFIG_NAND_OMAP_ELM or CONFIG_NAND_OMAP_BCH8 - enables CONFIG_BCH S/W library (lib/bch.c) required by OMAP_ECC_BCHx_CODE_HW_DETECTION_SW is enabled by CONFIG_BCH. - enables CONFIG_SYS_NAND_ONFI_DETECTION for auto-detection of ONFI compliant NAND devices - updates following README doc doc/README.nand board/ti/am335x/README doc/README.omap3 Signed-off-by: Pekon Gupta <pekon@ti.com> [scottwood@freescale.com: fixed unused variable warning] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
beba5f04 |
|
18-Nov-2013 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: make am33xx/elm.c as common driver for all OMAPx and AMxxxx platforms ELM hardware engine which is used for ECC error detection, is present on all latest OMAP SoC (like OMAP4xxx, OMAP5xxx, DRA7xxx, AM33xx, AM43xx). Thus ELM driver should be moved to common drivers/mtd/nand/ folder so that all SoC having on-chip ELM hardware engine can re-use it. This patch has following changes: - mv arch/arm/include/asm/arch-am33xx/elm.h arch/arm/include/asm/omap_elm.h - mv arch/arm/cpu/armv7/am33xx/elm.c drivers/mtd/nand/omap_elm.c - update Makefiles - update #include <asm/elm.h> - add CONFIG_NAND_OMAP_ELM to compile driver/mtd/nand/omap_elm.c and include in all board configs using AM33xx SoC platform. Signed-off-by: Pekon Gupta <pekon@ti.com> |
#
68ec9c85 |
|
04-Oct-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
mtd: move & update nand_ecclayout structure (plus board changes) nand_ecclayout is present in mtd.h at Linux. Move this structure to mtd.h to comply with Linux. Also, increase the ecc placement locations to 640 to suport device having writesize/oobsize of 8KB/640B. This means that the maximum oobsize has gone up to 640 bytes and consequently the maximum ecc placement locations have also gone up to 640. Changes from Prabhabkar's version (squashed into one patch to preserve bisectability): - Added _LARGE to MTD_MAX_*_ENTRIES This makes the names match current Linux source, and resolves a conflict between http://patchwork.ozlabs.org/patch/280488/ and http://patchwork.ozlabs.org/patch/284513/ The former was posted first and is closer to matching Linux, but unlike Linux it does not add _LARGE to the names. The second adds _LARGE to one of the names, and depends on it in a subsequent patch (http://patchwork.ozlabs.org/patch/284512/). - Made max oobfree/eccpos configurable, and used this on tricorder, alpr, ASH405, T4160QDS, and T4240QDS (these boards failed to build for me without doing so, due to a size increase). On tricorder SPL, this saves 2576 bytes (and makes the SPL build again) versus the new default of 640 eccpos and 32 oobfree, and saves 336 bytes versus the old default of 128 eccpos and 8 oobfree. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> CC: Vipin Kumar <vipin.kumar@st.com> [scottwood@freescale.com: changes as described above] Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Thomas Weber <weber@corscience.de> Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Cc: Stefan Roese <sr@denx.de> Cc: York Sun <yorksun@freescale.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: Stefan Roese <sr@denx.de> |
#
1a459660 |
|
08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com> |
#
3287f6d3 |
|
16-Nov-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
nand: Add torture feature This patch adds a NAND Flash torture feature, which is useful as a block stress test to determine if a block is still good and reliable (or should be marked as bad), e.g. after a write error. This code is ported from mtd-utils' lib/libmtd.c. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> [scottwood@freescale.com: removed unnec. ifdef and unwrapped error strings] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
eee623a5 |
|
22-Aug-2012 |
Joe Hershberger <joe.hershberger@ni.com> |
nand: Add support for unlock.invert NAND unlock command allows an invert bit to be set to unlock all but the selected page range. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> [scottwood@freescale.com: updated docs and added comment about invert bit] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
418396e2 |
|
02-Mar-2012 |
Scott Wood <scottwood@freescale.com> |
nand: extend .raw accesses to work on multiple pages A use for this is to read, modify, erase, and write an entire block as a single unit, as a replacement for the biterr command. This way gives more flexibility in that you can also test multiple bit errors, errors in the ECC, etc. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
578931b3 |
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12-Jan-2012 |
Scott Wood <scottwood@freescale.com> |
nand: Introduce CONFIG_SYS_NAND_SELF_INIT This allows a driver to run code between nand_scan_ident() and nand_scan_tail(), among other things. See the additions to doc/README.nand for details. To allow a gradual transition, Boards that don't set CONFIG_SYS_NAND_SELF_INIT will still be initialized the old way, but new drivers should not require this, and existing drivers should be converted when convenient. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
fb3659ac |
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23-Sep-2011 |
Marek Vasut <marek.vasut@gmail.com> |
NAND: Add nand read.raw and write.raw commands These commands should work around various "hardware" ECC and BCH methods. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> [scottwood@freescale.com: s/write the page/access the page/] Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
c9494866 |
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14-Jun-2011 |
Ben Gardiner <bengardiner@nanometrics.ca> |
cmd_nand: add nand write.trimffs command Add another nand write. variant, trimffs. This command will request of nand_write_skip_bad() that all trailing all-0xff pages will be dropped from eraseblocks when they are written to flash as-per the reccommended behaviour of the UBI FAQ [1]. The function that implements this timming is the drop_ffs() function by Artem Bityutskiy, ported from the mtd-utils tree. [1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Artem Bityutskiy <dedekind1@gmail.com> CC: Detlev Zundel <dzu@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
be33b046 |
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01-Apr-2009 |
Scott Wood <scottwood@freescale.com> |
Remove legacy NAND and disk on chip code. Legacy NAND had been scheduled for removal. Any boards that use this were already not building in the previous release due to an #error. The disk on chip code in common/cmd_doc.c relies on legacy NAND, and it has also been removed. There is newer disk on chip code in drivers/mtd/nand; someone with access to hardware and sufficient time and motivation can try to get that working, but for now disk on chip is not supported. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
6e29ed8e |
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28-Apr-2009 |
David Brownell <dbrownell@users.sourceforge.net> |
davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC) Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option. It's not just nasty; it's also unused by any current boards, and doesn't even match the main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC on newer chips that support it). DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30, match non-BROKEN code paths for 1-bit HW ECC. The BROKEN code paths do seem to partially match what MontaVista/TI kernels (4.0/2.6.10, and 5.0/2.6.18) do ... but only for small pages. Large page support is really broken (and it's unclear just what software it was trying to match!), and the ECC layout was making three more bytes available for use by filesystem (or whatever) code. Since this option itself seems broken, remove it. Add a comment about the MV/TI compat issue, and the most straightforward way to address it (should someone really need to solve it). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
99067b08 |
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01-Apr-2009 |
Scott Wood <scottwood@freescale.com> |
Noisily disable the legacy NAND subsystem. Legacy NAND is marked for feature removal after April 2009 (i.e. this upcoming release). There are still several boards that reference it (though many do so only for disk-on-chip support which has been silently disabled for a while now). These boards will now fail to build with #error, though the code is still there if the user removes #error. The plan is to remove the code outright in the next release, along with any board code that refers to it (such as board/esd/common/auto_update.c). Also, remove the legacy NAND API description from README.nand. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
6c869637 |
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16-Jan-2009 |
Wolfgang Grandegger <wg@grandegger.com> |
NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and changes the default from 8 to 1 for the legacy and the new MTD NAND layer. This allows to remove all NAND_MAX_CHIPS definitions in the board config files because none of the boards use multi chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 define #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE but that's bogus and did not work anyhow. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
6d0f6bcf |
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16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
9b05aa78 |
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30-Aug-2008 |
Hugo Villeneuve <hugo.villeneuve@lyrtech.com> |
ARM DaVinci: Fix broken HW ECC for large page NAND. Based on original patch by Bernard Blackham <bernard@largestprime.net> U-boot's HW ECC support for large page NAND on Davinci is completely broken. Some kernels, such as the 2.6.10 one supported by MontaVista for DaVinci, rely upon this broken behaviour as they share the same code for ECCs. In the existing scheme, error detection *might* work on large page, but error correction definitely does not. Small page ECC correction works, but the format is not compatible with the mainline git kernel. This patch adds ECC code that matches what is currently in the Davinci git repository (since NAND support was added in 2.6.24). This makes the ECC and OOB layout written by u-boot compatible with Linux for both small page and large page devices and fixes ECC correction for large page devices. The old behaviour can be restored by defining the macro CFG_DAVINCI_BROKEN_ECC, which is undefined by default. Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com> Acked-by: Sergey Kubushyn <ksi@koi8.net> Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
cc4a0cee |
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12-Aug-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
drivers/mtd/nand: Move conditional compilation to Makefile rename CFG_NAND_LEGACY to CONFIG_NAND_LEGACY Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
#
984e03cd |
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12-Jun-2008 |
Scott Wood <scottwood@freescale.com> |
NAND: Always skip blocks on read/write/boot. Use of the non-skipping versions was almost always (if not always) an error, and no valid use case has been identified. Signed-off-by: Scott Wood <scottwood@freescale.com> |
#
10c7382b |
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29-Dec-2007 |
Marcel Ziswiler <marcel@ziswiler.com> |
fix various comments Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com> |
#
b5501f7d |
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09-Jul-2007 |
Jon Loeliger <jdl@freescale.com> |
Update README.* to reference new CONFIG_CMD_* names now. Signed-off-by: Jon Loeliger <jdl@freescale.com> |
#
323bfa8f |
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22-Apr-2007 |
Stefan Roese <sr@denx.de> |
Remove BOARDLIBS usage completely Signed-off-by: Stefan Roese <sr@denx.de> |
#
856f0544 |
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28-Oct-2006 |
Stefan Roese <sr@denx.de> |
[PATCH] NAND: Partition name support added to NAND subsystem chpart, nboot and NAND subsystem related commands now accept also partition name to specify offset. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Stefan Roese <sr@denx.de> |
#
fcfed4f2 |
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18-Oct-2006 |
Wolfgang Denk <wd@pollux.denx.de> |
Coding Style cleanup. |
#
2255b2d2 |
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09-Oct-2006 |
Stefan Roese <sr@denx.de> |
* Several improvements to the new NAND subsystem: - JFFS2 related commands implemented in mtd-utils style - Support for bad blocks - Bad block testing commands - NAND lock commands Please take a look at doc/README.nand for more details Patch by Guido Classen, 10 Oct 2006 |
#
bfc81252 |
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06-Mar-2006 |
Wolfgang Denk <wd@nyx.denx.de> |
Minor code cleanup |
#
4e3ccd26 |
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06-Mar-2006 |
Wolfgang Denk <wd@nyx.denx.de> |
Merge the new NAND code (testing-NAND brach); see doc/README.nand Rewrite of NAND code based on what is in 2.6.12 Linux kernel Patch by Ladislav Michl, 29 Jun 2005 [Merge with /home/tur/nand/u-boot]
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#
8bde7f77 |
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27-Jun-2003 |
Wolfgang Denk <wdenk> |
* Code cleanup: - remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen) |
#
7a8e9bed |
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31-May-2003 |
Wolfgang Denk <wdenk> |
* Patch by Marc Singer, 29 May 2003: Fixed rarp boot method for IA32 and other little-endian CPUs. * Patch by Marc Singer, 28 May 2003: Added port I/O commands. * Patch by Matthew McClintock, 28 May 2003 - cpu/mpc824x/start.S: fix relocation code when booting from RAM - minor patches for utx8245 * Patch by Daniel Engstr�m, 28 May 2003: x86 update * Patch by Dave Ellis, 9 May 2003 + 27 May 2003: add nand flash support to SXNI855T configuration fix/extend nand flash support: - fix 'nand erase' command so does not erase bad blocks - fix 'nand write' command so does not write to bad blocks - fix nand_probe() so handles no flash detected properly - add doc/README.nand - add .jffs2 and .oob options to nand read/write - add 'nand bad' command to list bad blocks - add 'clean' option to 'nand erase' to write JFFS2 clean markers - make NAND read/write faster * Patch by Rune Torgersen, 23 May 2003: Update for MPC8266ADS board |
#
a430fa06 |
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16-Aug-2018 |
Miquel Raynal <miquel.raynal@bootlin.com> |
mtd: move NAND files into a raw/ subdirectory NAND flavors, like serial and parallel, have a lot in common and would benefit to share code. Let's move raw (parallel) NAND specific code in a raw/ subdirectory, to ease the addition of a core file in nand/ and the introduction of a spi/ subdirectory specific to SPI NANDs. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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#
83d290c5 |
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06-May-2018 |
Tom Rini <trini@konsulko.com> |
SPDX: Convert all of our single license tags to Linux Kernel style When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
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#
6ef2f901 |
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11-Aug-2017 |
Adam Ford <aford173@gmail.com> |
Convert CONFIG_BCH to Kconfig This converts the following to Kconfig: CONFIG_BCH Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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#
4dc34be4 |
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02-Oct-2016 |
Simon Glass <sjg@chromium.org> |
README: Fix CONFIG_SYS_NAND_MAX_DEVICE typo This should be CONFIG_SYS_MAX_NAND_DEVICE. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Scott Wood <oss@buserror.net> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: York Sun <york.sun@nxp.com>
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#
30780f94 |
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15-Jun-2016 |
Boris Brezillon <boris.brezillon@free-electrons.com> |
mtd: nand: Patch remaining places where nand_to_mtd() should be used Some drivers are still directly accessing the chip->mtd field. Patch them to use nand_to_mtd() instead. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
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#
caad0d00 |
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13-Jun-2016 |
Fabian Mewes <architekt@coding4coffee.org> |
nand: doc: fix example ecc scheme calculation Signed-off-by: Fabian Mewes <architekt@coding4coffee.org>
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#
1866be7d |
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13-Jun-2016 |
Max Krummenacher <max.oss.09@gmail.com> |
nand: extend nand torture nand torture currently works on exactly one nand block which is specified by giving the byteoffset to the beginning of the block. Extend this by allowing for a second parameter specifying the byte size to be tested. e.g. ==> nand torture 1000000 NAND torture: device 0 offset 0x1000000 size 0x20000 (block size 0x20000) Passed: 1, failed: 0 ==> nand torture 1000000 40000 NAND torture: device 0 offset 0x1000000 size 0x40000 (block size 0x20000) Passed: 2, failed: 0 Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Reviewed-by: Benoît Thébaudeau <benoit.thebaudeau.dev@gmail.com> [scottwood: fix usage to show size as optional, and add misssing braces] Signed-off-by: Scott Wood <oss@buserror.net>
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#
b616d9b0 |
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30-May-2016 |
Scott Wood <oss@buserror.net> |
nand: Embed mtd_info in struct nand_chip nand_info[] is now an array of pointers, with the actual mtd_info instance embedded in struct nand_chip. This is in preparation for syncing the NAND code with Linux 4.6, which makes the same change to struct nand_chip. It's in a separate commit due to the large amount of changes required to accommodate the change to nand_info[]. Signed-off-by: Scott Wood <oss@buserror.net>
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#
3f42dc87 |
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24-Nov-2015 |
Vagrant Cascadian <vagrant@debian.org> |
Fix typo: commmand -> command. Signed-off-by: Vagrant Cascadian <vagrant@debian.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
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#
5519194d |
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08-May-2015 |
Stefan Agner <stefan@agner.ch> |
mtd: vf610_nfc: add Freescale NFC controller configs to Kconfig This commit allows users to enable/disable the Freescale NFC controller found in systems like Vybrid (VF610), MPC5125, MCF54418 or Kinetis K70 via Kconfig with more detailed help docs. Signed-off-by: Stefan Agner <stefan@agner.ch> Acked-by: Stefano Babic <sbabic@denx.de> [scottwood: updated vf610twr_nand_defconfig] Signed-off-by: Scott Wood <scottwood@freescale.com>
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#
aff092ed |
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03-Feb-2015 |
Peter Tyser <ptyser@xes-inc.com> |
nand: Remove unused CONFIG_MTD_NAND_ECC_JFFS2 option This option was removed along with legacy NAND support in be33b046b549ad88c204c209508cd7657232ffbd. Clean up some remnants. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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#
c316f577 |
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25-Jun-2014 |
Daniel Mack <zonque@gmail.com> |
mtd: OMAP: Enable GPMC prefetch mode Enable GPMC's prefetch feature for NAND access. This speeds up NAND read access a lot by pre-fetching contents in the background and reading them through the FIFO address. The current implementation has two limitations: a) it only works in 8-bit mode b) it only supports read access Both is easily fixable by someone who has hardware to implement it. Note that U-Boot code uses non word-aligned buffers to read data into, and request read lengths that are not multiples of 4, so both partial buffers (head and tail) have to be addressed. Tested on AM335x hardware. Tested-by: Guido Martínez <guido@vanguardiasur.com.ar> Reviewed-by: Guido Martínez <guido@vanguardiasur.com.ar> Signed-off-by: Daniel Mack <zonque@gmail.com> [trini: Make apply again, use 'cs' fix pointed out by Guido] Signed-off-by: Tom Rini <trini@ti.com>
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#
4b0abf9f |
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03-Oct-2014 |
Masahiro Yamada <yamada.m@jp.panasonic.com> |
mtd: denali: add Denali controller configs to Kconfig Commit 3eb3e72a3f66 (nand/denali: Adding Denali NAND driver support) introduced some new options, and some of them were documented by commit f9860cf081ef (nand/denali: Document CONFIG symbols). This commit allows users to enable/disable them via Kconfig with more detailed help docs. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Chin Liang See <clsee@altera.com> Cc: Scott Wood <scottwood@freescale.com>
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#
f9860cf0 |
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25-Sep-2014 |
Scott Wood <scottwood@freescale.com> |
nand/denali: Document CONFIG symbols The patch "nand/denali: Adding Denali NAND driver support" introduced two config symbols without documenting them. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Chin Liang See <clsee@altera.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
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#
434f2cfc |
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18-Jul-2014 |
pekon gupta <pekon@ti.com> |
ARM: omap: move board specific NAND configs out from ti_armv7_common.h This patch moves some board specific NAND configs: - FROM: generic config file 'ti_armv7_common.h' - TO: individual board config files using these configs. So that each board can independently set the value as per its design. Following configs are affected in this patch: CONFIG_SYS_NAND_U_BOOT_OFFS: <refer doc/README.nand> CONFIG_CMD_SPL_NAND_OFS: <refer doc/README.falcon> CONFIG_SYS_NAND_SPL_KERNEL_OFFS: <refer doc/README.falcon> CONFIG_CMD_SPL_WRITE_SIZE: <refer doc/README.falcon> This patch also updates documentation for few of above NAND configs. Signed-off-by: Pekon Gupta <pekon@ti.com>
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#
867f0304 |
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02-Jun-2014 |
pekon gupta <pekon@ti.com> |
am335x: update README for BCH16 updates documentation with explanation on how to select ECC schemes. Signed-off-by: Pekon Gupta <pekon@ti.com>
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#
b80a6603 |
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05-May-2014 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: add CONFIG_SYS_NAND_BUSWIDTH_16BIT to indicate NAND device bus-width GPMC controller needs to be configured based on bus-width of the NAND device connected to it. Also, dynamic detection of NAND bus-width from on-chip ONFI parameters is not possible in following situations: SPL: SPL NAND drivers does not support ONFI parameter reading. U-boot: GPMC controller iniitalization is done in omap_gpmc.c:board_nand_init() which is called before probing for devices, hence any ONFI parameter information is not available during GPMC initialization. Thus, OMAP NAND driver expected board developers to explicitely write GPMC configurations specific to NAND device attached on board in board files itself. But this was troublesome for board manufacturers as they need to dive into lengthy platform & SoC documents to find details of GPMC registers and appropriate configurations to get NAND device working. This patch instead adds existing CONFIG_SYS_NAND_BUSWIDTH_16BIT to board config hich indicates that connected NAND device has x16 bus-width. And then based on this config GPMC driver itself initializes itself based on NAND bus-width. This keeps board developers free from knowing GPMC controller specific internals. Signed-off-by: Pekon Gupta <pekon@ti.com>
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#
3f719069 |
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18-Nov-2013 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: add CONFIG_NAND_OMAP_ECCSCHEME for selection of ecc-scheme This patch adds new CONFIG_NAND_OMAP_ECCSCHEME, replacing other distributed CONFIG_xx used for selecting NAND ecc-schemes. This patch aims at solving following issues. 1) Currently ecc-scheme is tied to SoC platform, which prevents user to select other ecc-schemes also supported in hardware. like; - most of OMAP3 SoC platforms use only 1-bit Hamming ecc-scheme, inspite the fact that they can use higher ecc-schemes like 8-bit ecc-schemes with software based error detection (OMAP_ECC_BCH4_CODE_HW_DETECTION_SW). - most of AM33xx SoC plaforms use 8-bit BCH ecc-scheme for now, but hardware supports BCH16 ecc-scheme also. 2) Different platforms use different CONFIG_xx to select ecc-schemes, which adds confusion for user while migrating platforms. - *CONFIG_NAND_OMAP_ELM* which enables ELM hardware engine, selects only 8-bit BCH ecc-scheme with h/w based error-correction (OMAP_ECC_BCH8_CODE_HW) whereas ELM hardware engine supports other ecc-schemes also like; BCH4, and BCH16 (in future). - *CONFIG_NAND_OMAP_BCH8* selects 8-bit BCH ecc-scheme with s/w based error correction (OMAP_ECC_BCH8_CODE_HW_DETECTION_SW). - *CONFIG_SPL_NAND_SOFTECC* selects 1-bit Hamming ecc-scheme using s/w library Thus adding new *CONFIG_NAND_OMAP_ECCSCHEME* de-couples ecc-scheme dependency on SoC platform and NAND driver. And user can select ecc-scheme independently foreach board. However, selection some hardware based ecc-schemes (OMAP_ECC_BCHx_CODE_HW) still depends on presence of ELM hardware engine on SoC. (Refer doc/README.nand) Signed-off-by: Pekon Gupta <pekon@ti.com>
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#
d016dc42 |
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18-Nov-2013 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: enable BCH ECC scheme using ELM for generic platform BCH8_ECC scheme implemented in omap_gpmc.c driver has following favours +-----------------------------------+-----------------+-----------------+ |ECC Scheme | ECC Calculation | Error Detection | +-----------------------------------+-----------------+-----------------+ |OMAP_ECC_BCH8_CODE_HW |GPMC |ELM H/W engine | |OMAP_ECC_BCH8_CODE_HW_DETECTION_SW |GPMC |S/W BCH library | +-----------------------------------+-----------------+-----------------+ Current implementation limits the BCH8_CODE_HW only for AM33xx device family. (using CONFIG_AM33XX). However, other SoC families (like TI81xx) also have ELM hardware module, and can support ECC error detection using ELM. This patch - removes CONFIG_AM33xx Thus this driver can be reused by all devices having ELM h/w engine. - adds omap_select_ecc_scheme() A common function to handle ecc-scheme related configurations. This can be used both during device-probe and via user-space u-boot commads to change ecc-scheme. During device probe ecc-scheme is selected based on CONFIG_NAND_OMAP_ELM or CONFIG_NAND_OMAP_BCH8 - enables CONFIG_BCH S/W library (lib/bch.c) required by OMAP_ECC_BCHx_CODE_HW_DETECTION_SW is enabled by CONFIG_BCH. - enables CONFIG_SYS_NAND_ONFI_DETECTION for auto-detection of ONFI compliant NAND devices - updates following README doc doc/README.nand board/ti/am335x/README doc/README.omap3 Signed-off-by: Pekon Gupta <pekon@ti.com> [scottwood@freescale.com: fixed unused variable warning] Signed-off-by: Scott Wood <scottwood@freescale.com>
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#
beba5f04 |
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18-Nov-2013 |
pekon gupta <pekon@ti.com> |
mtd: nand: omap: make am33xx/elm.c as common driver for all OMAPx and AMxxxx platforms ELM hardware engine which is used for ECC error detection, is present on all latest OMAP SoC (like OMAP4xxx, OMAP5xxx, DRA7xxx, AM33xx, AM43xx). Thus ELM driver should be moved to common drivers/mtd/nand/ folder so that all SoC having on-chip ELM hardware engine can re-use it. This patch has following changes: - mv arch/arm/include/asm/arch-am33xx/elm.h arch/arm/include/asm/omap_elm.h - mv arch/arm/cpu/armv7/am33xx/elm.c drivers/mtd/nand/omap_elm.c - update Makefiles - update #include <asm/elm.h> - add CONFIG_NAND_OMAP_ELM to compile driver/mtd/nand/omap_elm.c and include in all board configs using AM33xx SoC platform. Signed-off-by: Pekon Gupta <pekon@ti.com>
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#
68ec9c85 |
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04-Oct-2013 |
Prabhakar Kushwaha <prabhakar@freescale.com> |
mtd: move & update nand_ecclayout structure (plus board changes) nand_ecclayout is present in mtd.h at Linux. Move this structure to mtd.h to comply with Linux. Also, increase the ecc placement locations to 640 to suport device having writesize/oobsize of 8KB/640B. This means that the maximum oobsize has gone up to 640 bytes and consequently the maximum ecc placement locations have also gone up to 640. Changes from Prabhabkar's version (squashed into one patch to preserve bisectability): - Added _LARGE to MTD_MAX_*_ENTRIES This makes the names match current Linux source, and resolves a conflict between http://patchwork.ozlabs.org/patch/280488/ and http://patchwork.ozlabs.org/patch/284513/ The former was posted first and is closer to matching Linux, but unlike Linux it does not add _LARGE to the names. The second adds _LARGE to one of the names, and depends on it in a subsequent patch (http://patchwork.ozlabs.org/patch/284512/). - Made max oobfree/eccpos configurable, and used this on tricorder, alpr, ASH405, T4160QDS, and T4240QDS (these boards failed to build for me without doing so, due to a size increase). On tricorder SPL, this saves 2576 bytes (and makes the SPL build again) versus the new default of 640 eccpos and 32 oobfree, and saves 336 bytes versus the old default of 128 eccpos and 8 oobfree. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> CC: Vipin Kumar <vipin.kumar@st.com> [scottwood@freescale.com: changes as described above] Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Thomas Weber <weber@corscience.de> Cc: Matthias Fuchs <matthias.fuchs@esd-electronics.com> Cc: Stefan Roese <sr@denx.de> Cc: York Sun <yorksun@freescale.com> Cc: Tom Rini <trini@ti.com> Reviewed-by: Stefan Roese <sr@denx.de>
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1a459660 |
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08-Jul-2013 |
Wolfgang Denk <wd@denx.de> |
Add GPL-2.0+ SPDX-License-Identifier to source files Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
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3287f6d3 |
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16-Nov-2012 |
Benoît Thébaudeau <benoit.thebaudeau@advansee.com> |
nand: Add torture feature This patch adds a NAND Flash torture feature, which is useful as a block stress test to determine if a block is still good and reliable (or should be marked as bad), e.g. after a write error. This code is ported from mtd-utils' lib/libmtd.c. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Scott Wood <scottwood@freescale.com> [scottwood@freescale.com: removed unnec. ifdef and unwrapped error strings] Signed-off-by: Scott Wood <scottwood@freescale.com>
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eee623a5 |
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22-Aug-2012 |
Joe Hershberger <joe.hershberger@ni.com> |
nand: Add support for unlock.invert NAND unlock command allows an invert bit to be set to unlock all but the selected page range. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> [scottwood@freescale.com: updated docs and added comment about invert bit] Signed-off-by: Scott Wood <scottwood@freescale.com>
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418396e2 |
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02-Mar-2012 |
Scott Wood <scottwood@freescale.com> |
nand: extend .raw accesses to work on multiple pages A use for this is to read, modify, erase, and write an entire block as a single unit, as a replacement for the biterr command. This way gives more flexibility in that you can also test multiple bit errors, errors in the ECC, etc. Signed-off-by: Scott Wood <scottwood@freescale.com>
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578931b3 |
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12-Jan-2012 |
Scott Wood <scottwood@freescale.com> |
nand: Introduce CONFIG_SYS_NAND_SELF_INIT This allows a driver to run code between nand_scan_ident() and nand_scan_tail(), among other things. See the additions to doc/README.nand for details. To allow a gradual transition, Boards that don't set CONFIG_SYS_NAND_SELF_INIT will still be initialized the old way, but new drivers should not require this, and existing drivers should be converted when convenient. Signed-off-by: Scott Wood <scottwood@freescale.com>
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fb3659ac |
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23-Sep-2011 |
Marek Vasut <marek.vasut@gmail.com> |
NAND: Add nand read.raw and write.raw commands These commands should work around various "hardware" ECC and BCH methods. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Scott Wood <scottwood@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> [scottwood@freescale.com: s/write the page/access the page/] Signed-off-by: Scott Wood <scottwood@freescale.com>
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c9494866 |
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14-Jun-2011 |
Ben Gardiner <bengardiner@nanometrics.ca> |
cmd_nand: add nand write.trimffs command Add another nand write. variant, trimffs. This command will request of nand_write_skip_bad() that all trailing all-0xff pages will be dropped from eraseblocks when they are written to flash as-per the reccommended behaviour of the UBI FAQ [1]. The function that implements this timming is the drop_ffs() function by Artem Bityutskiy, ported from the mtd-utils tree. [1] http://www.linux-mtd.infradead.org/doc/ubi.html#L_flasher_algo Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Artem Bityutskiy <dedekind1@gmail.com> CC: Detlev Zundel <dzu@denx.de> Acked-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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be33b046 |
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01-Apr-2009 |
Scott Wood <scottwood@freescale.com> |
Remove legacy NAND and disk on chip code. Legacy NAND had been scheduled for removal. Any boards that use this were already not building in the previous release due to an #error. The disk on chip code in common/cmd_doc.c relies on legacy NAND, and it has also been removed. There is newer disk on chip code in drivers/mtd/nand; someone with access to hardware and sufficient time and motivation can try to get that working, but for now disk on chip is not supported. Signed-off-by: Scott Wood <scottwood@freescale.com>
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6e29ed8e |
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28-Apr-2009 |
David Brownell <dbrownell@users.sourceforge.net> |
davinci_nand: cleanup II (CONFIG_SYS_DAVINCI_BROKEN_ECC) Remove CONFIG_SYS_DAVINCI_BROKEN_ECC option. It's not just nasty; it's also unused by any current boards, and doesn't even match the main U-Boot distributions from TI (which use soft ECC, or 4-bit ECC on newer chips that support it). DaVinci GIT kernels since 2.6.24, and mainline Linux since 2.6.30, match non-BROKEN code paths for 1-bit HW ECC. The BROKEN code paths do seem to partially match what MontaVista/TI kernels (4.0/2.6.10, and 5.0/2.6.18) do ... but only for small pages. Large page support is really broken (and it's unclear just what software it was trying to match!), and the ECC layout was making three more bytes available for use by filesystem (or whatever) code. Since this option itself seems broken, remove it. Add a comment about the MV/TI compat issue, and the most straightforward way to address it (should someone really need to solve it). Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
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99067b08 |
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01-Apr-2009 |
Scott Wood <scottwood@freescale.com> |
Noisily disable the legacy NAND subsystem. Legacy NAND is marked for feature removal after April 2009 (i.e. this upcoming release). There are still several boards that reference it (though many do so only for disk-on-chip support which has been silently disabled for a while now). These boards will now fail to build with #error, though the code is still there if the user removes #error. The plan is to remove the code outright in the next release, along with any board code that refers to it (such as board/esd/common/auto_update.c). Also, remove the legacy NAND API description from README.nand. Signed-off-by: Scott Wood <scottwood@freescale.com>
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6c869637 |
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16-Jan-2009 |
Wolfgang Grandegger <wg@grandegger.com> |
NAND: rename NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS This patch renames NAND_MAX_CHIPS to CONFIG_SYS_NAND_MAX_CHIPS and changes the default from 8 to 1 for the legacy and the new MTD NAND layer. This allows to remove all NAND_MAX_CHIPS definitions in the board config files because none of the boards use multi chip support (NAND_MAX_CHIPS > 1) so far. The bamboo and the DU440 define #define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE but that's bogus and did not work anyhow. Signed-off-by: Wolfgang Grandegger <wg@grandegger.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
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6d0f6bcf |
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16-Oct-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
rename CFG_ macros to CONFIG_SYS Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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9b05aa78 |
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30-Aug-2008 |
Hugo Villeneuve <hugo.villeneuve@lyrtech.com> |
ARM DaVinci: Fix broken HW ECC for large page NAND. Based on original patch by Bernard Blackham <bernard@largestprime.net> U-boot's HW ECC support for large page NAND on Davinci is completely broken. Some kernels, such as the 2.6.10 one supported by MontaVista for DaVinci, rely upon this broken behaviour as they share the same code for ECCs. In the existing scheme, error detection *might* work on large page, but error correction definitely does not. Small page ECC correction works, but the format is not compatible with the mainline git kernel. This patch adds ECC code that matches what is currently in the Davinci git repository (since NAND support was added in 2.6.24). This makes the ECC and OOB layout written by u-boot compatible with Linux for both small page and large page devices and fixes ECC correction for large page devices. The old behaviour can be restored by defining the macro CFG_DAVINCI_BROKEN_ECC, which is undefined by default. Signed-off-by: Hugo Villeneuve <hugo.villeneuve@lyrtech.com> Acked-by: Sergey Kubushyn <ksi@koi8.net> Signed-off-by: Scott Wood <scottwood@freescale.com>
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cc4a0cee |
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12-Aug-2008 |
Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> |
drivers/mtd/nand: Move conditional compilation to Makefile rename CFG_NAND_LEGACY to CONFIG_NAND_LEGACY Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
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984e03cd |
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12-Jun-2008 |
Scott Wood <scottwood@freescale.com> |
NAND: Always skip blocks on read/write/boot. Use of the non-skipping versions was almost always (if not always) an error, and no valid use case has been identified. Signed-off-by: Scott Wood <scottwood@freescale.com>
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10c7382b |
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29-Dec-2007 |
Marcel Ziswiler <marcel@ziswiler.com> |
fix various comments Signed-off-by: Marcel Ziswiler <marcel@ziswiler.com>
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b5501f7d |
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09-Jul-2007 |
Jon Loeliger <jdl@freescale.com> |
Update README.* to reference new CONFIG_CMD_* names now. Signed-off-by: Jon Loeliger <jdl@freescale.com>
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323bfa8f |
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22-Apr-2007 |
Stefan Roese <sr@denx.de> |
Remove BOARDLIBS usage completely Signed-off-by: Stefan Roese <sr@denx.de>
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856f0544 |
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28-Oct-2006 |
Stefan Roese <sr@denx.de> |
[PATCH] NAND: Partition name support added to NAND subsystem chpart, nboot and NAND subsystem related commands now accept also partition name to specify offset. Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Signed-off-by: Stefan Roese <sr@denx.de>
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fcfed4f2 |
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18-Oct-2006 |
Wolfgang Denk <wd@pollux.denx.de> |
Coding Style cleanup.
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2255b2d2 |
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09-Oct-2006 |
Stefan Roese <sr@denx.de> |
* Several improvements to the new NAND subsystem: - JFFS2 related commands implemented in mtd-utils style - Support for bad blocks - Bad block testing commands - NAND lock commands Please take a look at doc/README.nand for more details Patch by Guido Classen, 10 Oct 2006
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bfc81252 |
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06-Mar-2006 |
Wolfgang Denk <wd@nyx.denx.de> |
Minor code cleanup
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8bde7f77 |
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27-Jun-2003 |
wdenk <wdenk> |
* Code cleanup: - remove trailing white space, trailing empty lines, C++ comments, etc. - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) * Patches by Kenneth Johansson, 25 Jun 2003: - major rework of command structure (work done mostly by Michal Cendrowski and Joakim Kristiansen)
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7a8e9bed |
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31-May-2003 |
wdenk <wdenk> |
* Patch by Marc Singer, 29 May 2003: Fixed rarp boot method for IA32 and other little-endian CPUs. * Patch by Marc Singer, 28 May 2003: Added port I/O commands. * Patch by Matthew McClintock, 28 May 2003 - cpu/mpc824x/start.S: fix relocation code when booting from RAM - minor patches for utx8245 * Patch by Daniel Engstr�m, 28 May 2003: x86 update * Patch by Dave Ellis, 9 May 2003 + 27 May 2003: add nand flash support to SXNI855T configuration fix/extend nand flash support: - fix 'nand erase' command so does not erase bad blocks - fix 'nand write' command so does not write to bad blocks - fix nand_probe() so handles no flash detected properly - add doc/README.nand - add .jffs2 and .oob options to nand read/write - add 'nand bad' command to list bad blocks - add 'clean' option to 'nand erase' to write JFFS2 clean markers - make NAND read/write faster * Patch by Rune Torgersen, 23 May 2003: Update for MPC8266ADS board
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