#
7b00e7eb |
|
04-May-2024 |
Jonas Karlman <jonas@kwiboo.se> |
rockchip: rk356x: Migrate to OF_UPSTREAM Migrate RK356x boards that exists in Linux v6.8 to use OF_UPSTREAM. Following targets is not migrated to use OF_UPSTREAM: - anbernic-rgxx3-rk3566: Multi device target - generic-rk3568: Generic target only meant for U-Boot use - pinetab2-rk3566: Merged in v6.9-rc1 Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6114fb8 |
|
24-Apr-2024 |
Quentin Schulz <quentin.schulz@theobroma-systems.com> |
rockchip: rk356x: use DRAM banks from ATAGS RK356x-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead. The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead. Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
8a94c376 |
|
02-Mar-2024 |
Jonas Karlman <jonas@kwiboo.se> |
rockchip: Use common bss and stack addresses on RK356x Currently the following memory layout is typically used on RK356x: [ 0, 256K) - SPL binary [ 256K, 2M) - TF-A / reserved [ -X, 4M) - SPL pre-reloc stack (SPL_STACK) [-128K, 4M) - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN) [ -X, 6M) - SPL reloc stack (SPL_STACK_R_ADDR) [ 5M, 6M) - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN) [ 10M, +X) - U-Boot proper binary (TEXT_BASE) [ -X, 12M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR) [-128K, 12M) - pre-reloc malloc heap (SYS_MALLOC_F_LEN) [ 64M, +16K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE) SPL can safely load U-Boot proper + FDT to [10M, 12M-128K) with this layout. Migrate to use common bss, stack and malloc heap size and addresses to remove this size limitation. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Update for pinetab2-rk3566_defconfig) Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
42fb448a |
|
03-Jan-2024 |
Tom Rini <trini@konsulko.com> |
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com> |
#
25f56459 |
|
01-Oct-2023 |
Jonas Karlman <jonas@kwiboo.se> |
configs: rockchip: Enable ethernet driver on RK356x boards Enable DWC_ETH_QOS_ROCKCHIP and related PHY driver on RK356x boards that have an enabled gmac node. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
6855fa62 |
|
29-Jul-2023 |
Jonas Karlman <jonas@kwiboo.se> |
board: rockchip: Add Pine64 SOQuartz on CM4-IO The Pine64 SOQuartz compute module is mostly pin-compatible with the RPi CM4 form factor. Therefore, it can slot into the official Raspberry Pi CM4 IO carrier board. Add this configuration to U-Boot. Features tested with a SOQuartz 4GB v1.1 2022-07-11: - SD-card boot - eMMC boot - USB host Device tree is imported from linux v6.4. Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
f6114fb8 |
|
24-Apr-2024 |
Quentin Schulz <quentin.schulz@theobroma-systems.com> |
rockchip: rk356x: use DRAM banks from ATAGS RK356x-based devices now support creating DRAM banks with proper holes by reading the ATAGS from Rockchip TPL blob, so let's use that mechanism instead. The CONFIG_NR_DRAM_BANK now defaults to 10 which is a safe bet for reading banks from ATAGS, so let's use the default value instead. Co-developed-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Chris Morgan <macromorgan@hotmail.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
8a94c376 |
|
02-Mar-2024 |
Jonas Karlman <jonas@kwiboo.se> |
rockchip: Use common bss and stack addresses on RK356x Currently the following memory layout is typically used on RK356x: [ 0, 256K) - SPL binary [ 256K, 2M) - TF-A / reserved [ -X, 4M) - SPL pre-reloc stack (SPL_STACK) [-128K, 4M) - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN) [ -X, 6M) - SPL reloc stack (SPL_STACK_R_ADDR) [ 5M, 6M) - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN) [ 10M, +X) - U-Boot proper binary (TEXT_BASE) [ -X, 12M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR) [-128K, 12M) - pre-reloc malloc heap (SYS_MALLOC_F_LEN) [ 64M, +16K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE) SPL can safely load U-Boot proper + FDT to [10M, 12M-128K) with this layout. Migrate to use common bss, stack and malloc heap size and addresses to remove this size limitation. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Update for pinetab2-rk3566_defconfig) Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
42fb448a |
|
03-Jan-2024 |
Tom Rini <trini@konsulko.com> |
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com> |
#
25f56459 |
|
01-Oct-2023 |
Jonas Karlman <jonas@kwiboo.se> |
configs: rockchip: Enable ethernet driver on RK356x boards Enable DWC_ETH_QOS_ROCKCHIP and related PHY driver on RK356x boards that have an enabled gmac node. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
6855fa62 |
|
29-Jul-2023 |
Jonas Karlman <jonas@kwiboo.se> |
board: rockchip: Add Pine64 SOQuartz on CM4-IO The Pine64 SOQuartz compute module is mostly pin-compatible with the RPi CM4 form factor. Therefore, it can slot into the official Raspberry Pi CM4 IO carrier board. Add this configuration to U-Boot. Features tested with a SOQuartz 4GB v1.1 2022-07-11: - SD-card boot - eMMC boot - USB host Device tree is imported from linux v6.4. Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
8a94c376 |
|
02-Mar-2024 |
Jonas Karlman <jonas@kwiboo.se> |
rockchip: Use common bss and stack addresses on RK356x Currently the following memory layout is typically used on RK356x: [ 0, 256K) - SPL binary [ 256K, 2M) - TF-A / reserved [ -X, 4M) - SPL pre-reloc stack (SPL_STACK) [-128K, 4M) - pre-reloc malloc heap (SPL_SYS_MALLOC_F_LEN) [ -X, 6M) - SPL reloc stack (SPL_STACK_R_ADDR) [ 5M, 6M) - reloc malloc heap (SPL_STACK_R_MALLOC_SIMPLE_LEN) [ 10M, +X) - U-Boot proper binary (TEXT_BASE) [ -X, 12M) - U-Boot proper pre-reloc stack (CUSTOM_SYS_INIT_SP_ADDR) [-128K, 12M) - pre-reloc malloc heap (SYS_MALLOC_F_LEN) [ 64M, +16K) - SPL bss (SPL_BSS_START_ADDR, SPL_BSS_MAX_SIZE) SPL can safely load U-Boot proper + FDT to [10M, 12M-128K) with this layout. Migrate to use common bss, stack and malloc heap size and addresses to remove this size limitation. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> (Update for pinetab2-rk3566_defconfig) Signed-off-by: Kever Yang <kever.yang@rock-chips.com> |
#
42fb448a |
|
03-Jan-2024 |
Tom Rini <trini@konsulko.com> |
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com> |
#
25f56459 |
|
01-Oct-2023 |
Jonas Karlman <jonas@kwiboo.se> |
configs: rockchip: Enable ethernet driver on RK356x boards Enable DWC_ETH_QOS_ROCKCHIP and related PHY driver on RK356x boards that have an enabled gmac node. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
6855fa62 |
|
29-Jul-2023 |
Jonas Karlman <jonas@kwiboo.se> |
board: rockchip: Add Pine64 SOQuartz on CM4-IO The Pine64 SOQuartz compute module is mostly pin-compatible with the RPi CM4 form factor. Therefore, it can slot into the official Raspberry Pi CM4 IO carrier board. Add this configuration to U-Boot. Features tested with a SOQuartz 4GB v1.1 2022-07-11: - SD-card boot - eMMC boot - USB host Device tree is imported from linux v6.4. Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
42fb448a |
|
03-Jan-2024 |
Tom Rini <trini@konsulko.com> |
configs: Resync with savedefconfig Rsync all defconfig files using moveconfig.py Signed-off-by: Tom Rini <trini@konsulko.com> |
#
25f56459 |
|
01-Oct-2023 |
Jonas Karlman <jonas@kwiboo.se> |
configs: rockchip: Enable ethernet driver on RK356x boards Enable DWC_ETH_QOS_ROCKCHIP and related PHY driver on RK356x boards that have an enabled gmac node. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
6855fa62 |
|
29-Jul-2023 |
Jonas Karlman <jonas@kwiboo.se> |
board: rockchip: Add Pine64 SOQuartz on CM4-IO The Pine64 SOQuartz compute module is mostly pin-compatible with the RPi CM4 form factor. Therefore, it can slot into the official Raspberry Pi CM4 IO carrier board. Add this configuration to U-Boot. Features tested with a SOQuartz 4GB v1.1 2022-07-11: - SD-card boot - eMMC boot - USB host Device tree is imported from linux v6.4. Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
25f56459 |
|
01-Oct-2023 |
Jonas Karlman <jonas@kwiboo.se> |
configs: rockchip: Enable ethernet driver on RK356x boards Enable DWC_ETH_QOS_ROCKCHIP and related PHY driver on RK356x boards that have an enabled gmac node. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
6855fa62 |
|
29-Jul-2023 |
Jonas Karlman <jonas@kwiboo.se> |
board: rockchip: Add Pine64 SOQuartz on CM4-IO The Pine64 SOQuartz compute module is mostly pin-compatible with the RPi CM4 form factor. Therefore, it can slot into the official Raspberry Pi CM4 IO carrier board. Add this configuration to U-Boot. Features tested with a SOQuartz 4GB v1.1 2022-07-11: - SD-card boot - eMMC boot - USB host Device tree is imported from linux v6.4. Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |
#
6855fa62 |
|
29-Jul-2023 |
Jonas Karlman <jonas@kwiboo.se> |
board: rockchip: Add Pine64 SOQuartz on CM4-IO The Pine64 SOQuartz compute module is mostly pin-compatible with the RPi CM4 form factor. Therefore, it can slot into the official Raspberry Pi CM4 IO carrier board. Add this configuration to U-Boot. Features tested with a SOQuartz 4GB v1.1 2022-07-11: - SD-card boot - eMMC boot - USB host Device tree is imported from linux v6.4. Co-developed-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Nicolas Frattaroli <frattaroli.nicolas@gmail.com> Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> |